National Repository of Grey Literature 51 records found  1 - 10nextend  jump to record: Search took 0.01 seconds. 
Measuring RLC on the components of electrical circuits
Pokorný, Marek ; Vítek, Ondřej (referee) ; Veselka, František (advisor)
Aim those work is inform numerator about possibilities and features gauging apparatus 7600 Precision LCR undergrounds and further then about metering paramers R,L,C on components electric standing ,especially then on sliding contacts,with which this work acquaint and how are their characteristics important for correct functionality electrical machine whereof are site rated power.Warp work largely start from manual to apparatus 7600 Precision LCR undergrounds and further then out publication sliding contact in electrical machine - doc. Veselka, doc. Chmelik.
Digital Steganography for Executables
Tobiáš, Pavel ; Bidlo, Michal (referee) ; Strnadel, Josef (advisor)
This bachelor's thesis concerns itself with steganographic concealment of arbitrary data in executable files . Initially it speaks in general terms , mainly about injection - and substitution - based steganographic methods for various types of cover - objects . Afterwards , the focus is on executable files in the ELF format and the x86 ISA family ; permutation - based methods for instructions and basic block chains are mentioned and the substitution - based method of instruction equivalence classes is examined . Consequently , the design, implementation , testing and optimization of a custom solution based on the last mentioned method are described . Finally , the methods and outcomes of experimenting with the custom solution are described .
Total usage of design dates for CNC programming of turbine casing
Matejková, Monika ; Prokop, Jaroslav (referee) ; Píška, Miroslav (advisor)
This thesis aims at designing a solution to the comprehensive use of construction underlying documents for the CNC programming of turbine casings. The introductory part of the thesis contains a description of the CNC programming and CAD/CAM systems. The following is mapping of the current state of the construction underlying documents, and mapping of the situation in the department of technology in Siemens Industrial Turbomachinery, s.r.o., Brno. The further section presents an analysis of the problem that arose when processing and sharing the construction underlying documents with the aim of streamlining the CNC programming process. The closing part presents the evaluation and conclusions for implementation of the proposed solutions.
Computer simulator for education
Friml, Dominik ; Macho, Tomáš (referee) ; Petyovský, Petr (advisor)
This bachelor thesis is divided into several parts. The first part consists of an introduction to individual parts of a processor and some of its peripheries. Next part of thesis is a research of existing educational and demonstrative tools usable in education. Results of the research were compiled into requirements for educational system. Using those requirements, and design of an architecture for educational processor for education, not only on FEEC BUT was created. As a next step, there is described a procedure, that led to a creation of a working simulator of the designed processor. Last part of this thesis is a design of several educational exercises, that demonstrates principles of computers and programming in a machine code and an assembly language.
Disassembler and Analyser of Binary Code
Bayer, David ; Smrčka, Aleš (referee) ; Peringer, Petr (advisor)
This thesis is focused on binary code disassembly. It describes the design of ARM and AVR architectures and does a research into existing solutions. Based on this knowledge, we designed and implemented a disassembler-like application. The application provides a graphical user interface to facilitate the starting of disassembly and displays the result. The designed environment is extensible to more disassemblers, disassembly algorithms, and code analysis.
Simulation of an ARM Processor for the Education of Programming in Assembler
Ondryáš, Ondřej ; Goldmann, Tomáš (referee) ; Orság, Filip (advisor)
This thesis aims to implement a didactic tool for simulation of an Arm-based processor integrated into the Visual Studio Code editor. The tool facilitates learning about the machine-level programming of these processors. It implements a service that provides an assembler and a simulator for the A32 instruction set. The service is built using the Unicorn emulation framework and other open-source tools. The editor extension uses the service to add support for the development and debugging of programs written in the assembly language. It shows descriptions of used instructions and helps the programmer understand their function. When debugging, it enables stepping through the code and provides various views of the state of the simulated processor, its registers and memory. The solution can be used in the Advanced Assembly Languages course at FIT BUT. It could be further improved in the future to support other architectures and provide an easy learning environment in other courses related to machine-level programming.
Design and Implementation of Mechanisms for Enhancing Performance of CPU
Zlatohlávková, Lucie ; Sekanina, Lukáš (referee) ; Strnadel, Josef (advisor)
This masters thesis is focused on the issue of processor architecture. The ground of this project is a design of a simple processor, which is enriched by modern components in processor architecture such as pipelining, cache memory and branch prediction. The processor has been made in VHDL programming language and was simulated in ModelSim simulation tool.
Translation of x86 Binary Code To a High-Level Language
Jurík, Marián ; Křivka, Zbyněk (referee) ; Kolář, Dušan (advisor)
The purpose of this MSc thesis is to create design and implementation of program for translation of x86 binary code to a high-level programming language. There is described PE file format for executables used in MS Windows operating systems in the first part of work. This document contains general information about instruction set IA-32, especially a way of decoding binary code to assembly language. There are described typical program constructions, which are being used in compilers. Design of creation high-level programming language was inspired by existing programming languages. Conclusion is made about advantages and disadvantages of approach used in this thesis.
Instructions
Kopčil, Tomáš ; Havlík, Vladimír (referee) ; Ruller, Tomáš (advisor)
In my work I deal with how to do things. Instructional videos, printed paper instructions for using the product or performing an artistic event - all serve only as a platform for self-realization. The condition in the approach is not strictly following the established procedures. Rather, it is about reassessing what is essential at the moment.
Theory and praxis of education to population protection on basic schools.
Kratochvíl, Zdeněk ; Mika, Otakar Jiří (referee) ; Novák, Jaromír (advisor)
Things, processes and phenomena are more and more risky. It is important to deal with security education since childhood. Law determines that primary school teachers are supposed to deal with this issue to make children develop these habits, skills and acquire necessary knowledge since their early childhood. The aim of this work is to elicit whether the system introduced in our school system in 2003 works.

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