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Experimental Platform for Free-Space Optical Communication in Water
Kousal, Martin ; Fedra, Zbyněk (referee) ; Král, Jan (advisor)
For the needs of underwater drones and seabed exploration, a live image from a camera mounted on the drone needs to be transmitted to the operator. Therefore, a hardware platform has been developed to research and experimentally verify the possibilities of cable-free optical communication in an aquatic environment. In this paper, the possibilities of communications in aquatic environments and their limitations are discussed. Furthermore, a communication chain of transmitter and receiver is designed and then simulated in Python. This proposed communication chain is then implemented. The FPGA configuration of the transmitter and receiver is described, and handlers and scripts are created to receive and process the transmitted signal. Finally, real measurements are performed in air and also mainly in a water environment, where the functionality of the whole chain is verified. In the last part of the paper, possible improvements and their impact on the whole platform are outlined.
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High-speed packet accumulation in FPGA
Beneš, David ; Pristach, Marián (referee) ; Dvořák, Vojtěch (advisor)
Tato práce popisuje návrh číslicového obvodu, který má potenciál snížit režii přenosu malých paketů na komunikační lince mezi vysokorychlostní síťovou kartou s FPGA a hostitelským počítačem. Tento obvod je určen speciálně pro platformu NDK vyvinutou sdružením CESNET z.s.p.o., proto je první kapitola věnována její specifikaci. Motivace k sepsání této práce je popsána v následující kapitole, která je věnována komunikační lince mezi hostitelským počítačem a FPGA. Poslední část popisuje návrh číslicového obvodu a jeho testování jak z pohledu funkčnosti, tak z propustnosti.
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Implementation of system for IC testing via JTAG interface
Prášil, Pavel ; Zachariášová, Marcela (referee) ; Petyovský, Petr (advisor)
This master thesis deals with testing integrated circuits containing RISC-V processor core using JTAG protocol. This thesis objective is to design a module for 2-wire JTAG protocol support and design of an extending protocol for RISC-V processor system bus access. Designed module will be used for the integrated circuit testing using a 2-wire JTAG interface in order to reduce the number of pins dedicated for JTAG interface. The extending protocol will be used to reduce time spent by integrated circuits testing. The thesis contains description of the RISC-V testing system, design and implementation of module for 2-wire JTAG protocol support and also design and implementation of module for system bus access by the extending protocol. The thesis also includes extension of testing SW environment by support of communication using the extending protocol and verification of HW solution functionality. The thesis contain evaluation of time efficiency of implemented communication solution.
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Servo-drive control by Zedboard platform
Kozumplík, Miroslav ; Bartík, Ondřej (referee) ; Veselý, Libor (advisor)
The Master`s thesis deals with the creation and implementation of a servo drive control using the Zedboard platform. The aim of the thesis is to describe the method of Field-Oriented Control of synchronous motor with permanent magnets. The FOC algorithm is implemented by using an automatic IP Core generation for the FPGA in the Zynq-7000 SoC. A printed circuit board is designed to interface the Zedboard platform with a real PMSM servo drive. The designed PCB contains a two-level voltage invertor composed of MOSFET transistors, Hall probes for measuring the current through the motor phases and other elements necessary for the control and feedback of the PMSM motor controlled by FOC and SVPWM algorithm.
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Verification environment for BLDC motor controller
Kalocsányi, Vít ; Kajan, Michal (referee) ; Dvořák, Vojtěch (advisor)
Tato práce se věnuje požadavku na důkladnou verifikaci při návrhu systému řízení BLDC motorů. V práci je vysvětlena funkční verifikace číslicových obvodů a univerzální verifikační metodika (UVM) a práce je zaměřena na návrh verifikačního prostředí s využitím této metodologie. Dále je v této práci vysvětlena typická struktura systému řízení BLDC motoru a definován způsob verifikace takového systému řízení. Dále je popsána implementace verifikačního prostředí a diskutovány přínosy zavedení UVM do verifikačního procesu.
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Spatial audio processing of a spherical microphone array
Tomešek, Jiří ; Honzík,, Petr (referee) ; Liska, Matej (advisor)
The diploma thesis focuses on the processing of spatial sound from a spherical microphone array, their properties, and the principles of capturing. It further explains the principles of operation of MEMS microphones and subsequent implementation. The interface between the microphone array and the computer is created using a programmable gate array along with a USB converter. The thesis outlines a suitable method for software implementation for communication, control, and interconnection of specific hardware. The implementation of individual functionalities was carried out and explained using the VHDL programming language in an FPGA. Data reception from the microphones via a TDM interface, control logic, and communication between the FPGA and the computer through an FTDI interface were implemented. Within the thesis, an application was also created in the Matlab environment for controlling the FPGA and processing data from the microphones, including a graphical user interface. The application implements the ambisonics method and a method for processing the audio signal using spatial filtering.
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Wireless charger based on the NFC Forum WLC 2.0 standard
Rada, Vojtěch ; Junasová, Veronika (referee) ; Šteffan, Pavel (advisor)
This diploma thesis is focused on wireless charging technology according to the Wireless Charing 2.0 standard by the NFC Forum and the design of an ASIC circuit of a device functioning as a listener, where the primary emphasis is placed on the digital design of this circuit. In the beginning the work deals with a general theory, gradually discussing all the standards from the NFC Forum that are necessary for the control protocol design according to the Wireless Charging 2.0. Subsequently, the analysis of a real communication in the development kit for this standard is conducted, based on which the system design of the digital circuit is made. The designed circuit is described by VHDL language and verified by running the basic simulations to check the functionality of the designed parts of the circuit. In the final part of the thesis, a prototype module with the proposed system is fabricated, implemented in an FPGA with a connected battery charger circuit and its functionality is tested in practice.
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Design and implementation of countermeasures against side-channel attacks on an FPGA platform
Kuřina, Petr ; Jedlička, Petr (referee) ; Dobiáš, Patrik (advisor)
Currently, significant progress is being made in the field of digital systems and cryptography, requiring adequate security against various forms of attacks. Special attention is paid to development on the FPGA (Field-Programmable Gate Array) platform, which provides flexibility and performance for implementing diverse applications, including cryptographic algorithms. This semester thesis focuses on the systematic analysis of possible leaks of sensitive information from the implementation of a cryptographic scheme on the FPGA platform. The FPGA platform is presented in the work, including HDL (Hardware Description Language) programming languages such as Verilog or VHDL. It then presents a general overview of side channels and their types, countermeasures, and a~detailed description of security techniques. The next chapter is the AES cryptographic scheme and a description of its operations. There is a chapter devoted to a comparison of current articles on the issue. The following is a description of a professional workplace, such as an oscilloscope or a Sakura-X (Sasebo-GIII) hardware board. In the final part, the measurement results are presented without any measures, only the AES algorithm is implemented, and then in the next part there is a countermeasure proposal, which is implemented and measured. The results are described and subsequently displayed in graphic form.
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Measurement module with PTP synchronization
Brabenec, Josef ; Burian, František (referee) ; Havránek, Zdeněk (advisor)
This master thesis deals with the time synchronization of precise measuring systems. The thesis examines various protocols for time synchronization and mainly focuses on the use of Precision Time Protocol (PTP). The thesis describes the key features and implementation possibilities of this protocol, and at the same time it deals with devices that are compatible with PTP. The firmware design for using the PTP protocol on the Cora Z7 development board is analyzed in detail. The PTPd library is used to implement the PTP protocol. Additionally, other necessary libraries were created for working with Ethernet frames, collecting time stamps, setting, adjusting and reading clocks. The thesis also includes experimental measurements aimed at verifying the practical functionality of the proposed solution.
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Design of the system for the carbon composite conductive layers of the L-39NG aircraft testing and the optimization of the conductive material
Pham, Ngoc Nam ; Hönig,, Martin (referee) ; Háze, Jiří (advisor)
V posledních desetiletích je v leteckém průmyslu výrazně preferováno použití kompozitů. Nejnovější projekty českého leteckého průmyslu se zaměřují také na zvýšení využití kompozitů v nových letadlech. Tato práce se zaměřuje na výzkum elektrických vlastností kompozitu za účelem optimalizace výběru materiálu. Diplomová práce představuje návrh automatické měřicí stanice sloužící k měření a testování elektrických vlastností kompozitních vzorků vyráběných společností AERO Vodochody AEROSPACE as. K tomuto účelu je použito zařízení LCR bridge R&S HM8118 a řídicí program je navržen v prostředí MATLAB s použitím jazyka SCPI. Navržený systém je následně použit pro experimentální ověření elektrické vodivosti kompozitních vzorků. Výsledky měření budou základem pro vývoj kompozitů pro leteckou vodivost v nových letadlech. Tato práce také prezentuje výsledky testu úderu blesku na vybraných kompozitních vzorcích. Výsledky testu na úder blesku poskytují hlubší znalosti o schopnosti vzorků chránit před úderem blesku. V této práci je také představen vývoj nedestruktivního testovacího systému založeného na metodě elektrické impedance/odporové tomografie. Vývoj je v prvních fázích, ale očekává se, že systém bude využíván jako systém monitorování zdraví struktur.
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