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Algorithms for Signal Processing in FPGA
Maršík, Lukáš ; Fučík, Otto (referee) ; Zemčík, Pavel (advisor)
This master's thesis describes ways of signal processing via digital devices. Major field of interest is an analysis of Doppler radar response and then mining of informations about detected object (e.g. speed, movement direction, length, ...). There was realized too little research, that's why borrowing some procedures from different branches not too much related to the IT is necessary. In case of using very complex methods that are easy to parallel, hardware implementation on the FPGA is supposed. With transceiver there is created a very powerful on-line system able to process most of tasks real-time. Then processed and transformed data are sent to the output so visualization and display can be made.
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Wireless Timer for Fire Sport Competitions
Holinka, Milan ; Šimek, Václav (referee) ; Bartoš, Pavel (advisor)
This thesis describes the design, development and realization of a wireless electronic timer for use in firesport. Specification of the final product is built with regard to versatility, ease of use and low acquisition costs. Commercial products have been compared as inspiration for this work. Requirements of the timer are based on the rules of firesport disciplines, where the timer can be used. It consists of a base station that can be accompanied for additional elements used to starting, splits capturing and stopping. An independent communication module has been created to ensure wireless connection. Libraries for comfort work with the module, support for USB bus and reliable protocol for wireless transmission have been implemented.
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Petri Net Interpreter for Control Systems with Atmel Processor
Minář, Michal ; Kočí, Radek (referee) ; Janoušek, Vladimír (advisor)
Thesis focuses on interpretation of nested petri nets described in PNML language on Atmel processors. It introduces this limited - from memory capacity and perfomance point of views - targeted architecture, since it greatly affected both design and implementation. The interpreter is thouroughly described from all aspects of its design. One of most important concerns in the whole process was the ability to test and verify achieved state of functionality quickly and possibly without Atmel processor. That’s why the implentation took place on a squeak platform, that allowed to translate whole interpreter for targeted platform. Motivation behind this and overall process of translation is also a subject of this work.
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FPGA Platform with .NET Micro Framework Support
Matyáš, Jan ; Minařík, Miloš (referee) ; Vašíček, Zdeněk (advisor)
The goal of the thesis is to design a development board that may be used for embedded systems prototyping. The board's key parts are an ARM-Cortex-based microcontroller and a FPGA programmable circuit. The platform is designed with .NET Micro Framework support in mind. The thesis contains specifications of the development board, describes the design process as well as the task of .NET Micro Framework porting and the establishment of communication bus between the FPGA and microcontroller circuits. The thesis is concluded by a set of demonstration examples which outline how to develop new applications for the designed platform.
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Electronic Drum Control Module
Doležal, Karel ; Růžička, Richard (referee) ; Šimek, Václav (advisor)
This paper deals with development and construction of an electronic drum module. The purpose of the device is to capture signals from an electronic drumkit and to produce sound accordingly. Firstly, a protoype with no sound output is constructed to demonstrate an ability to capture input signals. Based on its function, parameters for a final device are determined. Then, electronic component selection and design of printed circuit boards is described with an aim to maximalize polyphony and minimize latency of the sound generator. After that, firmware with software mixing algorithm is designed. Lastly, testing and measurement of real device parameters is performed.
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Implementation of Encryption Algorithms in VHDL Language
Kožený, Petr ; Martínek, Tomáš (referee) ; Kořenek, Jan (advisor)
This thesis deals with design and implementation of AES and DES encryption architectures for embedded systems. Architectures are implemented in VHDL language and design for FPGA technology. The proposed implementations are mapped on the Xilinx Spartan 3 technology. Both architectures are applied in simple ECB (Electronic Codebook) scheme with cache memories. A maximum throughput of design DES architecture 370 Mbps is achived with clock frequency of 104 MHz. The throughput of AES architecture at the maximum clock frequency of 118 MHz is 228 Mbps. Compared to software implementations for embedded systems, we achieve significantly higher throughput for both architectures.
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System for Programming Minerva Platform
Dohnal, Michal ; Strnadel, Josef (referee) ; Bidlo, Michal (advisor)
Theoretical part of this thesis studies several concepts and interfaces being used for programming microcontrollers (MCUs) and reconfiguration of field programmable gate arrays (FPGAs) with closer look at those, which are available for MCU Kinetis K60 and FPGA Spartan-6 in circuitry given by the architecture of educational kit Minerva. This knowledge is employed in practical section which describes deployment of the supporting firmware belonging to group of firmwares so-called bootloaders. Finally the application QDevKit3 is introduced, that is based on this firmware, representing effective and fast way for easy programming of FLASH memory on Kinetis MCU using USB interface.
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Measuring of System Load in Embedded Linux
Skopal, Jakub ; Korček, Pavol (referee) ; Viktorin, Jan (advisor)
The bachelor thesis describes the quantities which characterize the load of the embedded systems based on the Linux kernel. The library was designed and implemented to observe the load of the system in order to facilitate and unify the observation of individual quantities and their reciprocal coherence. Due to the lack of external dependencies of the library the memory requirements are low. To demonstrate the use of the implemented library, a program was designed which depicts the graphs of measured quantities in real time on a remote computer.
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Monitoring device for level crossings
Navrátil, Tomáš ; Kovář, Jan (referee) ; Kolka, Zdeněk (advisor)
Bachelor‘s thesis deals with a design of a safety appliance. The device will be used particularly at grade crossing. The record device allows monitoring of digital signals with the basic board and with microprocessor ATMEGA 128. Signals are patterned each second. The device is equipped with a USB interface, RS 485, ethernet and SD card. The capacity of SD card is designed for 40 days. The basic development board Ethernut, to which additional circuits were connected, was used for testing basic functions. Records are saved on a removable memory SD card in FAT 16 format. Old records are overwritten when the card is full. The project includes a description of communication with USB interface, a technical design of USB interface with photography of the hardware. Bachelor‘s thesis characterizes features of the SD card, communication and a description of the file system FAT 16. I also introduce a design of connecting SD card to the microprocessor within the SPI interface. All software was written in programming language C. There are described main functions of the code and their parameters.
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