National Repository of Grey Literature 99 records found  beginprevious41 - 50nextend  jump to record: Search took 0.02 seconds. 
Micro cooling with Peltier cell
Brázdil, Marian ; Bogdálek, Jan (referee) ; Pospíšil, Jiří (advisor)
This work concerns detail description of thermoelectric cooling modules, principles and practical utilization of thermoelectric cooling modules. Experimental part of this work studies computer cooling. Distribution of temperature at the cold and hot side of the thermoelectric cooling module as a function of load of a processor was measured. The obtained temperatures were compared with the common cooling methods.
VHDL Design of Advanced CPU
Slavík, Daniel ; Šimek, Václav (referee) ; Straka, Martin (advisor)
The goal of this project was to study pipelined processor architectures along with instruction and data cache. Chosen pipelined architecture should be designed and implemented using VHDL language. Firstly, I decided to implement the subscalar architecture first, secondly, three versions of scalar architecture. For these architectures synthesis into FPGA was done and performance of these architectures was compared on chosen algorithm. In the next part of this thesis I designed and implemented instruction and data cache logic for both architectures. However I was not able to synthetise these caches. Last chapter of this thesis deals with the superscalar architecture, which is the architecture of nowadays.
Simple one-chip microcontroller programmer
Verner, Lukáš ; Číž, Radim (referee) ; Daněček, Vít (advisor)
The main purpose of my bachelor thesis is acquaint with issue programming of Atmel AVR microcontrollers and to create a simple chipprogrammer with component units like LEDs, switches, LCD display, DA converter for testing and development. The first part deal about questions of theory programming memory inside microcontrollers and descrption of programming algorithm. The memories is possible program in three way. The most used method is method call „In System Programming“ ISP. This method provide easy and fast manupulation. Order method of programming memory require 12V supply. These method are parallel and serial high voltage programming. The concept of programmer is design to all method of programming memory. From previous information about programming memory was written source code of program to control programmer that receive command from computer and ensure performing of right algorithm in target microcontroller. In the next chapter is clarified design of hardware items and there is the simple user manual of items and installation of programmer. The final part of thesis explains how to use programmer's tworowconnectors and setting jumpers for programing in daily work. In attachments are electrical scheme, list of devices, printed circuit board, files of circuit board and scheme in Eagle format, source code and binary program to control microcontroller of simple chipprogrammer. These attachments are needed for make a chipprogrammer.
Transformation of a Processor Description in CodAL to SystemC Structures
Ondruš, Tomáš ; Hynek, Jiří (referee) ; Přikryl, Zdeněk (advisor)
The goal of this thesis is to create a generator of simulators and hardware representation of application specific processors in a SystemC language. An aim of the first part is to create a wrapper layer compatible with SystemC TLM 2.0 that wraps an existing simulator to avail modeling of transaction oriented systems. The second part is a generator of a hardware representation for the processor that is suitable not only for logical synthesis, but also for the simulation on a cycle accurate level. A final result is a state of the art solution comparable to existing generators.
Processor Model Creation Using ADL Language
Ostatník, Kristián ; Zachariášová, Marcela (referee) ; Hruška, Tomáš (advisor)
The goal of this thesis is to create an instruction-accurate model of ARC processor using the CodAL ADL language. The first part is dedicated to classification of processors and ADL languages. The second part describes the implementation process and the generation of C/C++ compiler for debugging and verification of the created model. At the end the created model is compared to an existing model ARC 700 on a set of benchmark tests.
Study of Inserting Hardware Trojans into Processors
Šviková, Johana ; Šimek, Václav (referee) ; Růžička, Richard (advisor)
This bachelor's thesis focuses on a specific aspect of cybersecurity known as hardware trojans, which are insidious attacks integrated directly into electronic components. The work begins with an analysis of the architecture and function of hardware trojans, examining their various types and classifications, and exploring methods for their detection and prevention. Furthermore, the thesis investigates how these attacks can impact compromised devices and how they can pose serious security risks. This thesis contains a design and implementation of a Trojan horse for a simple processor.
RISC-V Processor Peripherals
Vavro, Tomáš ; Kekely, Lukáš (referee) ; Martínek, Tomáš (advisor)
The RISC-V platform is one of the leaders in the computer and embedded systems industry. With the increasing use of these systems, the demand for available peripherals for the implementations of this platform is growing. This thesis deals with the FU540-C000 processor from SiFive company, which is one of the implementations of the RISC-V architecture, and its basic peripherals. Based on the analysis, an UART circuit for asynchronous serial communication was selected from the peripherals of this processor. The aim of this master thesis is to design and implement the peripheral in one of the languages for the description of digital circuits, and then create a verification environment, through which the functionality of the implementation will be verified.
Graphical Simulator of Superscalar Processors
Vávra, Jan ; Mrázek, Vojtěch (referee) ; Jaroš, Jiří (advisor)
Práce se zabývá implementací simulátoru superskalárního procesoru. Implementace se odvíjí od existujících simulátorů a jejich chybějících částí. Simulátor umí vykonávat instrukční sadu RISC-V, ovšem je umožněno přidání jakékoli RISC instrukční sady. Simulátor má deterministickou predikci skoku. Části procesoru lze upravovat. Součástí je i editor kódu pro danou instrukční sadu.
Automated Testing in FPGA
Valecký, David ; Přikryl, Zdeněk (referee) ; Hruška, Tomáš (advisor)
The aim of this work is to analyze the testing of processors developed by Codasip and find out which of the tests should be performed using FPGA devices. Furthermore, the goal is to design and implement a system for remote operation of FPGA devices connected to a central server in order to perform tests. The system is programmed in Python using the client-server architecture and Flask framework. The interaction of the server with the FPGA devices is ensured with the help of OpenOCD. The implemented system allows a~user to find out the status of connected FPGA circuits, configure these devices and then use them to run tests. The work uses FPGAs Artix-7 series made by Xilinx, placed on Digilent Nexys A7 development boards. The resulting testing of programmed chips in an FPGA representing a microprocessor is accelerated when using an FPGA device. Its results are faster on hardware representation than on its simulation in some cases.
Emulator of 8-bit computer with the possibility of configuration of individual components
Fajnor, Jakub ; Kliber, Filip (advisor) ; Ježek, Pavel (referee)
Emulation of the original 8-bit computers may be interesting for many people, es- pecially for true fans of older computers and nostalgic games. Currently, a lot of tools allowing such emulation exist, however, only for specific computer models. The aim of this thesis is to create a library that will enable its user to create models of arbitrary computers using configurable components, that will emulate workings of various parts of a real 8-bit computer. The library is developed on .NET platform and contains several implementations of basic components as a part of this work, including implementation of MOS 6502 processor and some of its descendants. In order not to limit the offer of available components, the library allows easy extension by allowing registration of new components. To demonstrate the use of the library, a simple WinForms application has been cre- ated. Using a graphical interface of the application, the end user of the emulator can create computer configurations and then control and monitor its emulation. 1

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