National Repository of Grey Literature 185 records found  previous11 - 20nextend  jump to record: Search took 0.01 seconds. 
Universal Graphic Editor Library and Python Module
Košulič, Jaroslav ; Kočí, Radek (referee) ; Smrčka, Aleš (advisor)
The diagrams, schemes, and graphs in general are widely used in the field of easy-to-read information visualisation. We use them for example in the school lessons for an algorithm presentation, or in the technical jobs such as software and hardware development by modelling UML diagrams, database schemes, etc. The project Universal Graph Editor has been established two years ago to fill the gap with the software tool providing such a modelling engine. The previous work has been reasumed in semestral project by design of the dynamic graph drawing (or the drawing of a vector graphic in general) and the library for graph manipulation with C-language interface. This master thesis continues further by creating a Python module using the developed interface. The documentation and the testing phase is conluding the annual work.
Hardware Modelling in UGE
Varga, Ladislav ; Očenášek, Pavel (referee) ; Smrčka, Aleš (advisor)
The goal of this thesis is to create a plugin for application Universal graphic editor, which will allow users to design a hardware architecture. Design of hardware architecture usualy starts with drawing of block diagrams of system which is being developed. Next step is to transcribe this drawn design into some hardware description language (HDL). Since structure of hardware design written in HDL is modular, i.e. similar to the structure of its block diagram, it's possible to translate block diagram of hardware design into HDL source code. The point of this idea is to get rid of designer's work on re-writing the block diagram into HDL language, as this can be automated. Designed plugin allows users to create block diagrams and new hardware components on different layers and switch between these layers interactively. Modul also implements the translation of drawn diagram into VHDL source code.
Server application to process data from a MySQL database and their interpretation
Gardian, Ján ; Zeman, Kryštof (referee) ; Červenák, Rastislav (advisor)
Diploma thesis is about creating server application that process and interprets data from the database. Main aim of such application is able to process a large number of database requests in real-time environment. Provided database contains records of measuring download speed and quality of mobile connection via different radio technology from various providers. Those measured data are sent from users all around the world and amount of data collected is still growing. Therefore created server application can adapt to increasing size of database thanks to aggregation. This method of aggregation and use of index in database tables are further discussed in the theoretical part. Mainly putting indexes in tables produce significant acceleration of processing database requests. Final product of this thesis is an application that consist of three components: a server application running aggregation, website that interprets measured data and back-end interface providing measured data as well. Data at the website are presented in form of graphs for different countries and used radio technologies. Web address and user manual for finished applications are provided in the fourth chapter of diploma thesis. In the last part of thesis are performed various speed tests of programmed application that confirm the effectiveness of selected and described methods to accelerate work with the database.
High-Level Petri Nets Interpreter in Python
Grigorev, Danil ; Kočí, Radek (referee) ; Janoušek, Vladimír (advisor)
This work is targeting a goal of implementing a high level Petri net interpret in Python. The implementation is based on SNAKES library. The final product is capable of executing and visualising Petri nets, created by user. The simulator is based on distributed systems theory and is executed in real-time. The end user is able to experience a simple and human-friendly API, made for creation and execution of High-Level Petri Nets.
Procedural Generation of Dungeon Type Structures
Šipoš, Marek ; Rychlý, Marek (referee) ; Bartík, Vladimír (advisor)
The main aim of this bachelor thesis was to design and develop a library for procedural generation of dungeons and web application for its practical use. The library offers a configuration interface, output generation according to this configuration and file support. The web application allows the visualization of the obtained input. The implementation was done in Java language.
Application possibilities of LNVGA programmable amplifier
Sobotka, Josef ; Hanák, Pavel (referee) ; Jeřábek, Jan (advisor)
This thesis deals with the theoretical description of the qualitative characteristics and parameters of some modern active elements, also discusses the theory of signal flow graphs at the level applicable for the following frequency filter design methods. The thesis is also generally discussed the issue with the circuit simulator PSpice modeling theory and voltage amplifiers on the basic 6-levels. The practical part of the work is divided into two parts. The first practical part is dedicated to design four levels of simulation model of components LNVGA element. The second practical part contains detailed theoretical proposals for three circuit structures implementing the frequency filters 2nd order (based on the basic structure of the OTA-C) using signal flow graphs with configuration options of Q and fm based on the parameters of active elements in the peripheral structure and their verification with prepared LNVGA model layers.
Graphs, Graph Algorithms and their Use in Finding the Shortest Path
Ott, Lukáš ; Moravec, Petr (referee) ; Bobalová, Martina (advisor)
This Bachelor thesis concentrates on introducing graphs and graph algorithms theories for finding the shortest path and consequential implementation of acquired pieces of knowledge into program MS Excel 2003 using VBA language. Chart theory applies to everything, from small problems to complex actions. If we are able to understand the basic pieces of knowledge presented in this thesis, we will also be able to put them into practice.
Extending the Parking and Boxes Laboratory Models for Connectivity to Decentralized Periphery
Mancl, Vlastimil ; Arm, Jakub (referee) ; Jirgl, Miroslav (advisor)
This bachelor’s thesis is about the description and connection of box conveyor and parking lot laboratory models to decentralized periphery made by SIEMENS with the usage of PROFIBUS DP communication standard. In order to do so, programs for controlling models were made in three different programming languages: LAD, STL and GRAPH. The programs were developed in engineering software SIMATIC STEP 7, created especially for programming PLCs made by SIEMENS company. Another part of this thesis is about the visualisation of laboratory models, made in WinCC software. The models were rated in terms of functionality and usability for study purposes. The results of this thesis are programes made for controlling the models with working visualisation and a possibility of connecting these models to decentralized peripheries.
Discovery of Wireless Sensor Network Topology Using Genetic Algorithms
Dalecký, Štěpán ; Samek, Jan (referee) ; Zbořil, František (advisor)
The thesis deals with a design of the genetic algorithm that is able to discover the wireless sensor network topology using signal strength among particular sensors. At first, the thesis describes the theory of genetic algorithm and wireless sensor network. Subsequently, on the basis of this theory, the genetic algorithm serving for the wireless sensor network topology discovery has been designed. The thesis also describes important features of the algorithm implementation. In conclusion, the outcomes have been reviewed.
Automatic Diagram Layout
Jezný, Lukáš ; Chmelař, Petr (referee) ; Herout, Adam (advisor)
Automatic layouts for diagram drawing is described in this paper. Major methods, algorithms, metrics for automatic layouts are introduced in theretical part. Practical part of this work was developing algorithms for automatic layouts of organizational structures and business process model diagrams.

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