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High data rate image processing using CUDA/OpenCL
Sedláček, Filip ; Klečka, Jan (referee) ; Honec, Peter (advisor)
The main objective of this research is to propose optimization of the defect detection algorithm in the production of nonwoven textile. The algorithm was developed by CAMEA spol. s.r.o. As a consequence of upgrading the current camera system to a more powerful one, it will be necessary to optimize the current algorithm and choose the hardware with the appropriate architecture on which the calculations will be performed. This work will describe a usefull programming techniques of CUDA software architecture and OpenCL framework in details. Using these tools, we proposed to implement a parallel equivalent of the current algorithm, describe various optimization methods, and we designed a GUI to test these methods.
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GPU-Accelerated Synthesis of Probabilistic Programs
Marcin, Vladimír ; Matyáš, Jiří (referee) ; Češka, Milan (advisor)
V tejto práci sa zoberáme problémom automatizovanej syntézy pravdepodobnostných programov: majme konečnú rodinu kandidátnych programov, v ktorej chceme efektívne identifikovať program spĺňajúci danú špecifikáciu. Aj riešenie tých najjednoduchších syntéznych problémov v praxi predstavuje NP-ťažký problém. Pokrok v tejto oblasti prináša nástroj Paynt, ktorý na riešenie tohto problému používa novú integrovanú metódu syntézy pravdepodobnostných programov. Aj keď sa tento prístup dokáže efektívne vysporiadať s exponenciálnym rastom rodín kandidátnych riešení, stále tu existuje problém spôsobený exponenciálnym rastom jednotlivých členov týchto rodín. S cieľom vysporiadať sa aj s týmto problémom, sme implementovali GPU orientované algoritmy slúžiace na overovanie kandidátnych programov (modelov), ktoré danú úlohu paralelizujú na stavovej úrovni pravdepodobnostých modelov. Celkové zrýchlenie doshiahnuté týmto prístupom za určitých podmienok potom prinieslo takmer teoretický limit možného zrýchlenia syntézneho procesu.
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GPGPU parallel computing
Pacura, Dávid ; Horák, Karel (referee) ; Petyovský, Petr (advisor)
The aim of this trim’s thesis is to reveal possibilities and demonstrate parallelization of computation on graphics processors. The paper presents descriptions of available development tools, and then one of them is selected to implement MD5 encryption algorithm and neural network for optical character recognition. Its performance is then compared to its parallel equivalent for conventional processors. In conclusion, problems encountered during development are described, and ways of avoiding them are discussed.
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Assisted Code Vectorization and Parallelization Using the OpenMP 4.0 Standard
Slouka, Lukáš ; Nikl, Vojtěch (referee) ; Jaroš, Jiří (advisor)
The subject of the bachelor's thesis is code optimization using the OpenMP 4.0 standard which provides tools for assisted parallelization and vectorization. In addition to the descrip tion of the OpenMP 4.0 standard, the thesis as well contains an insight into architectures of modern computers, specifically the system of cache memories and SSE/AVX modules that play a major role in the optimization field. The thesis demonstrates advantages of optimized code compared to unoptimized version on a set of benchmarks which are aimed at various aspects of optimization.
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General Processing on Graphics Processing Units for Industrial Systems
Lukačovič, Martin ; Mašek, Jan (referee) ; Krkoš, Radko (advisor)
The thesis deals with the abilities of graphics processors for GPGPU. It contains historical solutions to contemporary design. There are also described graphics processors from the largest manufacturers of this time, their focus and goals in the future. For algorithms implementation using GPU, there are necessary APIs that offer various possibilities of execution. In addition to the CPU and GPU universal heterogeneous computing, there are alternatives such as FPGA and DSP so it is necessary to consider the price and energy cost. Part of the work is devoted to the communication possibilities with the hardware and advanced memory approaches. For demonstrating parallel computing an implementation of matrix multiplication in OpenCL was realized.
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CMOS VLSI Circuits Simulation
Šťastná, Hilda ; Kocina, Filip (referee) ; Šátek, Václav (advisor)
This diploma thesis deals with processes of electrical circuits calculations in the last years' worldwide standards like Dymola, MATLAB, Maple or SPICE applications. Circuits calculations are linked with methods for solving linear differential equations, used in this work also by verification of functionality of designed models for CMOS inverter, CMOS NAND, CMOS NOR. Numerical integration method in combination with Taylor series is a suitable method also for parallel calculations of CMOS VLSI circuits. CMOS circuits simulation was implemented with this method in applications in MATLAB language, solving circuits, represented by differential equations. Functionality of the applications was verified by some real examples. Significant acceleration of calculations using Taylor series compared to other methods is an important factor in choosing methods used in circuit simulations.
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GPU-Accelerated Synthesis of Probabilistic Programs
Marcin, Vladimír ; Matyáš, Jiří (referee) ; Češka, Milan (advisor)
V tejto práci sa zoberáme problémom automatizovanej syntézy pravdepodobnostných programov: majme konečnú rodinu kandidátnych programov, v ktorej chceme efektívne identifikovať program spĺňajúci danú špecifikáciu. Aj riešenie tých najjednoduchších syntéznych problémov v praxi predstavuje NP-ťažký problém. Pokrok v tejto oblasti prináša nástroj Paynt, ktorý na riešenie tohto problému používa novú integrovanú metódu syntézy pravdepodobnostných programov. Aj keď sa tento prístup dokáže efektívne vysporiadať s exponenciálnym rastom rodín kandidátnych riešení, stále tu existuje problém spôsobený exponenciálnym rastom jednotlivých členov týchto rodín. S cieľom vysporiadať sa aj s týmto problémom, sme implementovali GPU orientované algoritmy slúžiace na overovanie kandidátnych programov (modelov), ktoré danú úlohu paralelizujú na stavovej úrovni pravdepodobnostých modelov. Celkové zrýchlenie doshiahnuté týmto prístupom za určitých podmienok potom prinieslo takmer teoretický limit možného zrýchlenia syntézneho procesu.
|
|
|
High data rate image processing using CUDA/OpenCL
Sedláček, Filip ; Klečka, Jan (referee) ; Honec, Peter (advisor)
The main objective of this research is to propose optimization of the defect detection algorithm in the production of nonwoven textile. The algorithm was developed by CAMEA spol. s.r.o. As a consequence of upgrading the current camera system to a more powerful one, it will be necessary to optimize the current algorithm and choose the hardware with the appropriate architecture on which the calculations will be performed. This work will describe a usefull programming techniques of CUDA software architecture and OpenCL framework in details. Using these tools, we proposed to implement a parallel equivalent of the current algorithm, describe various optimization methods, and we designed a GUI to test these methods.
|
|
|
CMOS VLSI Circuits Simulation
Šťastná, Hilda ; Kocina, Filip (referee) ; Šátek, Václav (advisor)
This diploma thesis deals with processes of electrical circuits calculations in the last years' worldwide standards like Dymola, MATLAB, Maple or SPICE applications. Circuits calculations are linked with methods for solving linear differential equations, used in this work also by verification of functionality of designed models for CMOS inverter, CMOS NAND, CMOS NOR. Numerical integration method in combination with Taylor series is a suitable method also for parallel calculations of CMOS VLSI circuits. CMOS circuits simulation was implemented with this method in applications in MATLAB language, solving circuits, represented by differential equations. Functionality of the applications was verified by some real examples. Significant acceleration of calculations using Taylor series compared to other methods is an important factor in choosing methods used in circuit simulations.
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