National Repository of Grey Literature 12 records found  1 - 10next  jump to record: Search took 0.00 seconds. 
Design of the tunable second order switched capacitor frequency filter
Bragina, Tatiana ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
Thesis describes analog filters topologies with capability of tuning of the main parameters and the MOSFET-C and switched-capacitor filters are described. With focus to linearity and maximal tuning range optimal topology have been chosen. In work the issue of analog switch design is described and is solved. Design of switched-capacitor low-pass Sallen-key filter in Cadence software was made and simulation results are presented.
Design of AD converter with low supply voltage in CMOS technology
Holas, Jiří ; Háze, Jiří (referee) ; Kledrowetz, Vilém (advisor)
Tato diplomová práce se zabývá návrhem 12 bitového řetězového A/D převodníku. Součástí návrhu bylo vytvořit referenční model převodníku v prostředí Matlab a determinovat faktory, které negativně ovlivňují výsledek konverze. S využitím nabytých poznatků navrhnout řetězový převodník na transistorové úrovni v prostředí Cadence. V teoretické části jsou shrnuty základy A/D převodu a dále jsou představeny nejčastěji používané architektury A/D převodníků. V dalších částech je popsán a diskutován vliv neidealit na vlastnosti řetězových převodníků. Praktická část se již věnuje popisu základních charakteristik řetězových převodníků a dokazuje funkci modelu. Z výsledků modelové struktury byly stanoveny reálné parametry, které byly dále využity v procesu tvorby návrhu v CMOS technologii TSMC 0,18m s nízkým napájecím napětím.
Design of the Rail-to-Rail operational amplifier in CMOS
Cvešper, Stanislav ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
This thesis deals with design of rail-to-rail class AB operational amplifier in CMOS technology I3T25. Starting with a short introduction to CMOS transistors, following with description of operational amplifier, structures of operational amplifier, its design and simulation in software Cadence, with added description of techniques for minimalizing input offset voltage. Main goal is to design a rail-to-rail input common mode range operational amplifier with minimal input offset voltage with layout included.
Electro-thermal model and simulation of integrated circuit
Sikora, Martin ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
Thermal effects in integrated circuits have increasing impact on chip's lifetime and function. For this reason, the chips must be subjected to electro-thermal simulations prior to the launch of production in order to avoid potential circuit failures. Therefore, in the first part of this diploma thesis these effects and methods of creating thermal models are described. The thesis also explores available tools for electro-thermal simulations and the way these simulators work. In the practical part of the thesis, the operation of electro-thermal simulation in the Eldo tool is verified, a method of automated thermal network creation is proposed and a application for its generation based on the circuit layout is implemented. The results of the electro-thermal simulation with the generated thermal network are compared with the results of the currently used method.
Models of transistors of CMOS 0.35 um process for PSpice
Veverka, Vojtěch ; Dvořák, Radek (referee) ; Šotner, Roman (advisor)
The master’s thesis focuses on model designing of active components for PSpice simulator. Creation of models are based on text description, which is avaible in Cadence Spectre libraries. The aim of this thesis is approximate conversion of CMOS and bipolar tranzistors based on I3T 0.35 m technology. Simulation’s results and their comparation are discussed below.
The possibility of measuring the intensity of physical activity based on the number of steps and heart rate data in adults, school and preschool children
Jarco, Michal ; Buchtelová, Aneta (advisor) ; Musálek, Martin (referee)
The number of people suffering from overweight or obesity is growing worldwide. One of the most important factors contributing to weight gain is the lack of exercise, which is nowadays caused mainly by a sedentary lifestyle. Exercise is therefore very important for our health and in children it also significantly contributes to the proper development of their cognitive functions. This thesis is focused on the possibility of using data about total number of steps for a certain time unit (per minute or throughout the day) to classify the intensity of physical activity (especially moderate and vigorous) it also marginally deals with the possibility of evaluating the intensity of physical activity using heart rate data. According to internationally recognized standards, an adult should spend at least 30 minutes (60 minutes is recommended for children) a day in moderate intensity physical activity, or 15 minutes (30 minutes for children) in vigorous intensity physical activity. Many studies focused on adults agreed that the cadence of around 90-110 steps per minute is optimal for achieving moderate intensity of physical activity, but the height, age and gender of individuals also play an important role. For children, this value is around 120 steps per minute, but age is much more important than gender....
Electro-thermal model and simulation of integrated circuit
Sikora, Martin ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
Thermal effects in integrated circuits have increasing impact on chip's lifetime and function. For this reason, the chips must be subjected to electro-thermal simulations prior to the launch of production in order to avoid potential circuit failures. Therefore, in the first part of this diploma thesis these effects and methods of creating thermal models are described. The thesis also explores available tools for electro-thermal simulations and the way these simulators work. In the practical part of the thesis, the operation of electro-thermal simulation in the Eldo tool is verified, a method of automated thermal network creation is proposed and a application for its generation based on the circuit layout is implemented. The results of the electro-thermal simulation with the generated thermal network are compared with the results of the currently used method.
Utilization of measurer for external performance in preparation period of cyclists and triathlonists in Czech republic
Kučera, Zdeněk ; Horčic, Josef (advisor) ; Kovářová, Lenka (referee)
SUMMARY: Title: Usage of measurer of external performance in trainings of cyclists and triathlonists in Czech republic Made by: Zdeněk Kučera Supervisor: PaedDr. Josef Horčic, Ph.D. Objectives: The main goal of this bachelor thesis is to find out, what is the usage of measurer of external performance for training management. The usage of wattmeter will be analysed among cyclists and triathlonists in Czech Republic. Methods: In my research, which was realized for the purpose of reaching the goal of thesis, was used the survey. The obtained information were sorted and interpreted by graphs. Results: It was found out, that performance measuring according to watts is supported and wattmeter plays an important role among other ways of measuring performance. It is necessary, that using of this tool has to be based on experiences, knowledge and individual access of cyclist. In despite of popularity of wattmeter the other ways of performance measuring are still inconsiderable, especially heart rate is not replaceable. Keywords:Wattmeter, heart rate, cadence, training management.
Design of the Rail-to-Rail operational amplifier in CMOS
Cvešper, Stanislav ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
This thesis deals with design of rail-to-rail class AB operational amplifier in CMOS technology I3T25. Starting with a short introduction to CMOS transistors, following with description of operational amplifier, structures of operational amplifier, its design and simulation in software Cadence, with added description of techniques for minimalizing input offset voltage. Main goal is to design a rail-to-rail input common mode range operational amplifier with minimal input offset voltage with layout included.
Design of AD converter with low supply voltage in CMOS technology
Holas, Jiří ; Háze, Jiří (referee) ; Kledrowetz, Vilém (advisor)
Tato diplomová práce se zabývá návrhem 12 bitového řetězového A/D převodníku. Součástí návrhu bylo vytvořit referenční model převodníku v prostředí Matlab a determinovat faktory, které negativně ovlivňují výsledek konverze. S využitím nabytých poznatků navrhnout řetězový převodník na transistorové úrovni v prostředí Cadence. V teoretické části jsou shrnuty základy A/D převodu a dále jsou představeny nejčastěji používané architektury A/D převodníků. V dalších částech je popsán a diskutován vliv neidealit na vlastnosti řetězových převodníků. Praktická část se již věnuje popisu základních charakteristik řetězových převodníků a dokazuje funkci modelu. Z výsledků modelové struktury byly stanoveny reálné parametry, které byly dále využity v procesu tvorby návrhu v CMOS technologii TSMC 0,18m s nízkým napájecím napětím.

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