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Design and implementation of countermeasures against side-channel attacks on an FPGA platform
Kuřina, Petr ; Jedlička, Petr (referee) ; Dobiáš, Patrik (advisor)
Currently, significant progress is being made in the field of digital systems and cryptography, requiring adequate security against various forms of attacks. Special attention is paid to development on the FPGA (Field-Programmable Gate Array) platform, which provides flexibility and performance for implementing diverse applications, including cryptographic algorithms. This semester thesis focuses on the systematic analysis of possible leaks of sensitive information from the implementation of a cryptographic scheme on the FPGA platform. The FPGA platform is presented in the work, including HDL (Hardware Description Language) programming languages such as Verilog or VHDL. It then presents a general overview of side channels and their types, countermeasures, and a~detailed description of security techniques. The next chapter is the AES cryptographic scheme and a description of its operations. There is a chapter devoted to a comparison of current articles on the issue. The following is a description of a professional workplace, such as an oscilloscope or a Sakura-X (Sasebo-GIII) hardware board. In the final part, the measurement results are presented without any measures, only the AES algorithm is implemented, and then in the next part there is a countermeasure proposal, which is implemented and measured. The results are described and subsequently displayed in graphic form.
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Methods of steganography
Obdržálková, Karolína ; Blažek, Petr (referee) ; Člupek, Vlastimil (advisor)
This bachelor thesis deals with steganography, its types and methods. Steganography is generally described in this work. A significant part of this thesis is devoted to the development of steganography and also describes how is steganography used for malware and copyright protection. The next part describes the types of steganography according to the type of carrier, their methods and properties of steganographic methods. Based on theoretical knowledge, an application with a graphical user interface was created to hide and reveal secret information using steganographic method LSB. This application is described in the final part together with the evaluation of security of hidden information.
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Application of metallic materials for selective growth
Němeček, Tomáš ; Rezek, Bohuslav (referee) ; Čechal, Jan (advisor)
The Si(100) surface and Ga surface phases up to 1 ML on their oxidation have been studied by XPS and LEED. The selective growth of Ga on the SiO2/Si structures fabricated by EBL has been analyzed using SEM and AFM methods. It was proved that Ga clusters grow in structures beside the oxide. The structure of alumina on Ni3Al(111) and NiAl(110) substrates was fully determined by combining the results of STM measurements and DFT simulations. It was determined the alumina/NiAl(110) does not form a suitable template for ordered Fe and Co clusters growth. However, the next research confirmed the alumina/Ni3Al(111) forms template appropriate to clusters growth purpose.
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Specialized Instruction Design
Koscielniak, Jan ; Zachariášová, Marcela (referee) ; Hruška, Tomáš (advisor)
The purpose of this thesis is to design and implement specialized instructions for RISC-V instruction set architecture. These instruction are used to accelerate a set of selected cryptographic algorithms. New instructions are implemented in Codasip Studio for 32bit processor model with RV32IM instruction set. Open source implementations were selected and edited to use new instructions. Instructions were used on respective algorithms, tested and profiled. The outcome of this thesis is instruction set extension, that enables up to seven times speed up, depending on used algorithm.
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Quantum and Post-quantum Cryptography
Krivulčík, Andrej ; Ricci, Sara (referee) ; Hajný, Jan (advisor)
S pokrokom v rozvoji kvantových počítačov prichádza hrozba prelomenia algoritmov ktoré sa používajú pri bežnej komunikácii. S týmto vzniklo odvetvie pre post-kvantovú kryptografiu ktoré vyvíja algoritmy odolné voči kvantovým počítačom. Cieľom tejto diplomovej práce naštudovanie metód pre kombináciu a využitie kľúčov ustanovených pomocou kvantových a post-kvantových algoritmov takým spôsobom, keby pri došlo k prelomeniu jedného z daných algoritmov tak výsledný hybridný klúč bude stále bezpečný. Výsledný klúč je následne využitý pri šifrovaní súboru pomocou AES--256 ktorý je zaslaný medzi klientami.
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Safe Communication App for Windows Phone
Vícha, Tomáš ; Veľas, Martin (referee) ; Herout, Adam (advisor)
The aim of this thesis is to describe the application development for secure communication between two users. The description begins with the analysis of already existing solutions, continues with the design of the user interface and the determination of requirements. There is also described a selection of suitable technologies and stages of application development together with its testing. The result of this work is an user-friendly application for the Windows Phone platform that performs end-to-end encryption of individual messages.
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Secure data transmition using bar codes
Kratochvíl, Martin ; Herout, Adam (referee) ; Beran, Vítězslav (advisor)
The goal of this thesis was to create a system for visual data transmition using bar codes. It focuses mainly on the protection of the system against abuse. A mechanism was designed for the data transmition itself and the various security concepts. The most appropriate bar code for data transmition was selected on the basis of the analysis.
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Simulation of cryptographic algorithms using FPGA
Németh, František ; Mašek, Jan (referee) ; Smékal, David (advisor)
Bachelor thesis is dealing with a cipher standard AES and with a design of encryption and decryption components for AES in special modes of operation. Programming language is VHDL. In theoretical part of thesis is a further descriptions of AES and behaviour of block cipher operation modes. Furthermore the brief description of VHDL, FPGA and NetCOPE framework is a piece of theoretical part as well. The practical part contains designs which are made in developing environment Vivado from Xilinx. Programmed modes of operation are ECB, CBC, CTR and CFB. Simulation outputs and synthesis results are summerized in tables.
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AES Tolerance to Timing Analysis
Ondruš, Juraj ; Matyáš, Václav (referee) ; Cvrček, Daniel (advisor)
This thesis deals with timing analysis of the AES (Advanced Encryption Standard). The design of {\em Rijndael\/}, which is the AES algorithm, is described here. For the side channel attacks is necessary to know the principles of the cache memory in CPU and its architecture. In this thesis are involved major security problems of AES which can be used for successful attacks. Several different implementations of AES are discussed too. Several types of timing attaks are also described. According to the experimentations these attacks should be efficient to the most presently used AES implementations. Finally, the results of this work are described, possible countermeasures against this attack and motions for the next research.
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Implementation of cryptographic algorithms on the FPGA platform
Zugárek, Adam ; Sládok, Ondřej (referee) ; Smékal, David (advisor)
This bachelor’s thesis describes methods of data encryption and author’s own implementation on FPGA. The goal of this thesis is to implement cipher on a hardware accelerated network card COMBO. In the introduction is described encryption using block ciphers. Cipher AES was chosen to implement, which is famous and most using cipher. Its detailed description is described in the first part of the thesis. In the second part is described the author’s own implementation of AES cipher in VHDL. In the next part is method of interconnecting the resulting program with a framework of the FPGA card – NetCOPE. Achieved results are in the end of this thesis. The resulting program cannot encrypt network communication. It only transforms data stored in the card, which then send to host computer.
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