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ISM band wireless transmission
Juráň, Jeroným ; Nešpor, Dušan (referee) ; Friedl, Martin (advisor)
This document summarizes the basic possibilities of communication using ISM bands. It also includes extracts from the ČTÚ regulation concerning usage of ISM bands. The theoretical part describes mainly the functions of chosen transmitter and receiver module. Secondly it describes the design and realization of transmitter and receiver devices including the C libraries for basic use, usable distance measurement and example application using developed devices.
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Fast Regular Expression Matching Using FPGA
Kaštil, Jan ; Martínek, Tomáš (referee) ; Kořenek, Jan (advisor)
The thesis explains several algorithms for pattern matching. Algorithms work in both software and hardware. A part of the thesis is dedicated to extensions of finite automatons. The second part explains hashing and introduces concept of perfect hashing and CRC. The thesis also includes a suggestion of possible structure of a pattern matching unit based on deterministic finite automatons in FPGA. Experiments for determining the structure and size of resulting automatons were done in this thesis.
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Hardware Implementation of CRC for High Speed Networks
Belešová, Michaela ; Martínek, Tomáš (referee) ; Matoušek, Jiří (advisor)
This bachelor's thesis deals with a problem of hardware implementation of CRC for high speed networks. In the first section, there is a description of basic information about CRC and several methods for CRC calculation. From methods described in the first section methods representing Galois fields and methods describing connection of units computing CRC in parallel and in series were chosen. Based on these methods an implementation was created. This implementation expects 256b input words and achieves throughput over 40Gbps. This implementation also deals with a problem of unaligned starts and ends of frames and possible occurrence of pieces from two different frames in the same word. The whole solution was designed with minimal resource usage in mind.
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Serial Data concentrator in VHDL
Řeháček, Tomáš ; Valach, Soběslav (referee) ; Burian, František (advisor)
In the bachelor’s thesis text there are summarized basics of VHDL language, ISE Webpack development environment is described. Also the way of communication and properties of serial unit are described as well as Ethernet standard properties and the way of communication via MII interface. Hardware used for the data concentrator design is briefly introduced in the next part. At the end of the thesis there is analysis of the data concentrator design for data transmission from serial unit to Ethernet using protocols UDP/IP.
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Mathematical security methods in digital data transfer
Bartušek, Petr ; Kureš, Miroslav (referee) ; Vašík, Petr (advisor)
This master’s thesis deals with an analysis of digital security with CRC. In the thesis there is described a principle of coding theory, especially then digital security with CRC, for which there is explained a mathematical principle of their encoding and decoding, software implementation and a description of frequently used generator polynomials. The main aim of the thesis is a testing of undetected errors and a finding of number of these errors. After that it is used for the computation of probability with which undetected errors can occur. The thesis is supplemented with several programs which are programmed in the software Matlab.
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Wireless Messaging System
Machatý, Jiří ; Rozman, Jiří (referee) ; Sekora, Jiří (advisor)
This project proposal describes the involvement of a wireless pager. It describes the possibility of realization, block diagrams of the receiver and transmitter controlprogram for their individual and flowcharts. In the theoretical design are taken intoaccount the ease of use, durability and endurance of the battery function. Was chosenfor the realization of a suitable wireless module, with a sufficient range. The goal is todesign a suitable wireless pager with sufficient range, durability and reasonable price that could be used within a department or a house to call for help.
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Sensory system of mobile robot
Pata, Jaroslav ; Žalud, Luděk (referee) ; Burian, František (advisor)
This work deals with development and implementation of sensory system of mobile robot. Sensory modules will be connected to the main control unit of the robot. Communication bus should be chosen. This bus must be reliable and extensible. Expected skills: Programming of microcontrollers AVR, desing and production of printed circuit board and knowledge of principles of basic type of sensors.
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Implementation of ethernet communication inteface into FPGA chip
Skibik, Petr ; Fujcik, Lukáš (referee) ; Bohrn, Marek (advisor)
The thesis deals with the implementation of Ethernet-based network communication interface into FPGA chip. VHDL programming language is used for description of the hardware. The interface includes the implementation of link-layer Ethernet protocol and network protocols such as IPv4, ARP, ICMP and UDP. The final design allows bi-directional communication on the transport-layer level of TCP/IP model. The designed interface was implemented into Virtex5 FPGA chip on development board ML506 by Xilinx.
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Wireless Messaging System
Musil, Tomáš ; Dlouhý, Jiří (referee) ; Sekora, Jiří (advisor)
The aim of thesis is a design of wireless pager, that can be used for short text messages transmission from the sender to a particular recipient. The report is sent from a computer via serial port. The application is based on microcontrollers, which provide data protection, evaluation and display data on the display of the receiver. The wireless transmission is effected via the RF modules, that are powered from batteries.
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