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SW development and testing for engine monitoring module
Sumtsov, Artem ; Sova, Václav (referee) ; Krejsa, Jiří (advisor)
Diplomová práce popisuje vývojovou techniku Model Based Design a její použití pro návrh a testování algoritmů. Popis této techniky je proveden na příkladu praktického využití v praxi při vývoji modulu monitorování stavu motoru ve spolupráci se společností UNIS,a.s. Vývoj v oblasti současné letecké techniky klade velký důraz na monitorování životnosti zařízení. Podle výstupů algoritmu se dají naplánovat preventivní opravy s ohledem na aktuální podmínky opotřebení a provozování. Implementace algoritmů je provedena v prostředí Matlab/Simulink s následným testováním na platformě dSpace
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Model Driven Development of Android Applications
Bělehrádek, Stanislav ; Burget, Radek (referee) ; Rychlý, Marek (advisor)
This thesis deals with the design and implementation of Android application development tool based on model driven software development. The first part of the thesis is focused on general software development and next part on software development based on model driven development and executable UML. In next part Android platform, methods of Android application development and existing MDD tools are described. This thesis continues with the design of my own MDD tool for the creation of Android applications. The designed tool is realized like Gradle plugin and independent development environment using thisplugin. The designed tool is based on fUML and ALF language. The features and options of development tool are demonstrated by creation of example application.
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Automatic project code generation in TIA portal
Halata, Roman ; Jirgl, Miroslav (referee) ; Štohl, Radek (advisor)
The diploma thesis deals with an automatic code generation for PLC from Siemens. The first part focuses on currently available tools for code generation and options of C# library Siemens TIA Openness. Furthermore, a design for the project structure in the TIA portal is created. Finally, a user application for automatic code generation in TIA portal v15 is designed and created, especially suitable for larger projects that could be divided into individual stations.
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Code Generation Using Design Patterns
Hanák, František ; Malinka, Kamil (referee) ; Jurnečka, Peter (advisor)
This thesis describes code generation using design patterns. It deals with questions of specification of design patterns and their usage in code generation. The main part of thesis follows describtions of design patterns, their categorization, usage purpose and main ways of design patterns definitions. It describes the most often used formal design patterns specifications, their possible usage in code generation and design of algorithm for searching similar structures of patterns in source code in detail.
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Novel Methods of Control Systems Design with MATLAB/Simulink
Válek, Vít ; Kozovský, Matúš (referee) ; Blaha, Petr (advisor)
The content of this thesis is to introduce the tools of MATLAB/Simulink, which allow to generate the source code in C language. It will be demonstrated how to combine the source code written in C with Simulink model and MATLAB code. The code will be generated for the selected functions and compared with RTCESL library functions. In the last part of this thesis the principle of FOC will be briefly described. For a simplified loop of FOC, the code will be generated and then compared with handwritten code. For comparison, the microcontroller KV46F256 from NXP Semiconductors is used.
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Information System Generator
Falhar, Radek ; Hanáček, Petr (referee) ; Jurnečka, Peter (advisor)
Goal of this work is to design and implement too for passive code generation for specific information system framework. This framework is ZeroFramework that is targeted at client-server development of applications running on .NET platform. For code generation, T4 Scaffolding library is used, which allows to divide code generation logic into separate parts (scaffolders). This work is mainly concerned with design and implementation of those scaffolders and their linking with T4Scaffolding library. Results of this work are templates and logic for generation of files and classes, which implement logic needed for display, adding, modification and deletion of specific database entity.
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C Compiler in Python
Fiedor, Tomáš ; Bidlo, Michal (referee) ; Vašíček, Zdeněk (advisor)
There is currently no big link between creation of compilers and processor design and their instruction sets in courses. The goal of this work is to create easily extensible and modular compiler, which will enable experiments with instruction sets of used target processor. Compiler implements several optimization techniques. Their impact is more closely discussed. One of the advanced used techniques is context generation of output code. This technique generates less code than common blind generation.
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Octave to C++ Source-to-Source Compiler
Ševčík, Václav ; Křivka, Zbyněk (referee) ; Kolář, Martin (advisor)
It is difficult to use programs developed in the interactive programming environment Matlab for low-memory devices and for integration into projects without the language support. Therefore, the programs are converted into C++. In practice, manual transfer is used which significantly prolongs the time of the developing program. The work focuses on the automation of translation from Octave/Matlab to C++ using the Eigen library to enable matrix and vector operations. The translator allows 39 basic operations and 13 functions of the Octave language. Experiments show that this translation will reduce memory requirements of up to 99%
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Generated Peephole Optimizations in LLVM Compiler
Melo, Stanislav ; Podivínský, Jakub (referee) ; Hruška, Tomáš (advisor)
One of the important feature of application specific processors is performance. To maximize it, the compiler must adapt to needs of processor that it is going to compile for and it must generate the most efficient code. One of the ways to do that is to search for appropriate instructions that can be implemented as one instruction with multiple outputs. Afterwards the generated code can be parsed through peephole optimizations that search for instruction patterns and replace them with other instructions to make code more effective. This paper describes the problem of finding and selecting suitable candidates for multiple output instructions. It also provides a brief overview of the few best known algorithms that solve this problem. Eventually it examines possibilities of incorporating this optimizations to LLVM compiler.
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