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Test Driven Development for FPGA Designs
Halász, Dávid ; Strnadel, Josef (referee) ; Šimek, Václav (advisor)
Tato bakalářská práce popisuje, jak může být princip TDD uplatněn u hardware, převážně pro vývoj FPGA. Je popsána důležitá teorie pro pochopení kontextu. Na referenčním návrhu jsou představeny některé dostupné a užitečné verifikační nástroje. Jeden z těchto nástrojů byl vybrán a pomocí TDD byl vytvořen a úspěšně otestován návrh komunikačního modulu SPI.
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Hardware Modelling in UGE
Varga, Ladislav ; Očenášek, Pavel (referee) ; Smrčka, Aleš (advisor)
The goal of this thesis is to create a plugin for application Universal graphic editor, which will allow users to design a hardware architecture. Design of hardware architecture usualy starts with drawing of block diagrams of system which is being developed. Next step is to transcribe this drawn design into some hardware description language (HDL). Since structure of hardware design written in HDL is modular, i.e. similar to the structure of its block diagram, it's possible to translate block diagram of hardware design into HDL source code. The point of this idea is to get rid of designer's work on re-writing the block diagram into HDL language, as this can be automated. Designed plugin allows users to create block diagrams and new hardware components on different layers and switch between these layers interactively. Modul also implements the translation of drawn diagram into VHDL source code.
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Door control module
Šrámek, Jiří ; Burian, František (referee) ; Fiedler, Petr (advisor)
The thesis deals with development of the control module of a permanent magnet synchronous motor (PMSP) which is being developed as a reliable part of the platform door system. The whole electronics (including reliable, safe and information parts) will be a product of STARMON company. The paper fully describes the determination of requirements and limitations coming from the national standards involved. Furthermore, it describes the process used for the identification of PMSM parameters, the method used for controlling the PMSM by the original electronics and other generally known methods, while choosing the most optimal one for this application, including the process of designing appropriate controllers. After that, it deals with designing appropriate schematic and realization of hardware. The end of the thesis describes the structure of communication protocol, developed firmware as well as the developed PC application and its user interface.
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Door control module
Šrámek, Jiří ; Burian, František (referee) ; Fiedler, Petr (advisor)
The thesis deals with development of the control module of a permanent magnet synchronous motor (PMSP) which is being developed as a reliable part of the platform door system. The whole electronics (including reliable, safe and information parts) will be a product of STARMON company. The paper fully describes the determination of requirements and limitations coming from the national standards involved. Furthermore, it describes the process used for the identification of PMSM parameters, the method used for controlling the PMSM by the original electronics and other generally known methods, while choosing the most optimal one for this application, including the process of designing appropriate controllers. After that, it deals with designing appropriate schematic and realization of hardware. The end of the thesis describes the structure of communication protocol, developed firmware as well as the developed PC application and its user interface.
|
|
|
Test Driven Development for FPGA Designs
Halász, Dávid ; Strnadel, Josef (referee) ; Šimek, Václav (advisor)
Tato bakalářská práce popisuje, jak může být princip TDD uplatněn u hardware, převážně pro vývoj FPGA. Je popsána důležitá teorie pro pochopení kontextu. Na referenčním návrhu jsou představeny některé dostupné a užitečné verifikační nástroje. Jeden z těchto nástrojů byl vybrán a pomocí TDD byl vytvořen a úspěšně otestován návrh komunikačního modulu SPI.
|
|
|
Hardware Modelling in UGE
Varga, Ladislav ; Očenášek, Pavel (referee) ; Smrčka, Aleš (advisor)
The goal of this thesis is to create a plugin for application Universal graphic editor, which will allow users to design a hardware architecture. Design of hardware architecture usualy starts with drawing of block diagrams of system which is being developed. Next step is to transcribe this drawn design into some hardware description language (HDL). Since structure of hardware design written in HDL is modular, i.e. similar to the structure of its block diagram, it's possible to translate block diagram of hardware design into HDL source code. The point of this idea is to get rid of designer's work on re-writing the block diagram into HDL language, as this can be automated. Designed plugin allows users to create block diagrams and new hardware components on different layers and switch between these layers interactively. Modul also implements the translation of drawn diagram into VHDL source code.
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