Original title: Test Driven Development for FPGA Designs
Translated title: Test Driven Development for FPGA Designs
Authors: Halász, Dávid ; Strnadel, Josef (referee) ; Šimek, Václav (advisor)
Document type: Bachelor's theses
Year: 2013
Language: eng
Publisher: Vysoké učení technické v Brně. Fakulta informačních technologií
Abstract: [eng] [cze]

Keywords: aserce; FPGA; HDL; navrh hardware; simulace; TDD; testovaci soubor; testovani aplikacnich jednotek; verifikace; assertion; FPGA; hardware design; HDL; simulation; TDD; test-driven development; testbench; unit-tests; verification

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/187481

Permalink: http://www.nusl.cz/ntk/nusl-605773


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Bachelor's theses
 Record created 2024-04-02, last modified 2024-04-03


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