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Code Analysis and Transformation
Křoustek, Jakub ; Masařík, Karel (referee) ; Meduna, Alexandr (advisor)
This paper describes methods and procedures used for code analysis and transformation. It contains basic information of a science discipline called reverse engineering and its use in information technologies. The primary objective is a construction of tool that can disassemble from binary form to symbolic machine code. This operation is highly dependent on the concrete instruction set, and it has to be used for a beforehand known processor architecture. This problem is solved with patterns, plug-ins, and modularity of disassembler. These features provide users the ability to add new instruction sets into this disassembler. The output is the text representation of instructions and is functionally equivalent to the in-put. The thesis demonstrates usual methods of disassembly as well as the methods made by the author.
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Windows Software Protection Against Reverse Engineering
Korvas, Pavol ; Ďurfina, Lukáš (referee) ; Hruška, Tomáš (advisor)
This thesis deals with familiarization with the reverse engineering, the modalities of its use and misuse in practice and becoming familiar with existing tools to protect software and tools developed within the Lissom project. It also focuses on the analysis of existing methods of security breaches and the proposal of protection for Lissom project applications in collaboration with the license server for operating system Windows.
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Interactive Disassembler
Mrva, Milan ; Přikryl, Zdeněk (referee) ; Křoustek, Jakub (advisor)
This thesis describes procedures and tools of reverse engineering in terms of software development. There are introduces different techniques of protection against decomposition of executables. The work also mentions some programs used for decomposition analysis. Furthermore it contains information about architecture of processing units, with emphasis on microprocessors Intel and Motorola. Variety of executable formats is shown. Generic retargetable disassembler was implemented. There is a description of its structure and plugins. These plugins represents three algorithms used for disassembling a program. One of them applies a multi-process parsing engine, which is an own design by author of the thesis. At the end, these techniques are compared and further development is outlined.
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Intergration of AVG Development Tools to Visual Studio 2005 Environment
Rajman, Jakub ; Hrubý, Martin (referee) ; Kočí, Radek (advisor)
Bachelor's thesis treats of creating small application called add-in for Visual Studio 2005. Add-in provides some new AVG development tools into IDE. First tool offers support for new Visual Studio Debugger's visualizers. Second add-in's ability is Editor and Manager C++ Code Snipets. And the last tool is integration AVG Program documentation as a help in Visual Studio. All these tools cooperate with firm's server.
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Enhancement of Decompilation Results
Končický, Jaromír ; Ďurfina, Lukáš (referee) ; Křoustek, Jakub (advisor)
As a part of the Lissom project, a retargetable decompiler is being developed. Its main purpose is to decompile programs for any particular microprocessor architecture into any high-level programming language. At this thesis's beginning time, its results are not optimal because the decompiler doesn't utilize all program's additional information during decompilation that can improve the results. In this thesis, reverse engineering and Lissom decompiler is described. Techniques of using additional information to enhance decompilation results are proposed. These are data section content analysis and debug information analysis (specifically the debug information in PDB format which is proprietary format). Exploration of internal PDB structure and its content is a part of this thesis. The implementation of data section analysis and debug information utilizing is described and in the end, final decompilation results are discussed.
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PicoBlaze Simulator and Debugger
Vampola, Pavel ; Křivka, Zbyněk (referee) ; Vašíček, Zdeněk (advisor)
This thesis describes processor PicoBlaze and his possibilities of simulation and debugging. Structure, intruction set and existing developing tools of the processor will be presented to the reader. The thesis describes design and implementation of plugin for QDevKit, which allows simulating and stepping the procesor on personal computer or FITkit.
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Tool for Easy Coding and Debugging of PHP Application
Pavelka, Jan ; Křivka, Zbyněk (referee) ; Marušinec, Jaromír (advisor)
The goal of this master's thesis is an introducing with tools for easy coding and debugging of PHP applications and to implement such tool on the basis of analysis of common requirements and specific requirements of IS VUT designers. The project includes an introduction with important ideas and terms referring to tool, analysis and specifications of requirements and design and implementation of final tool.
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Debugger for Generic Microprocessor Simulators
Wilczák, Milan ; Husár, Adam (referee) ; Přikryl, Zdeněk (advisor)
Application specific instruction set processors become part of every day life although it's not always visible at first sight. During their development it's needed to somehow describe their architecture, instruction set and behavior. To make their developement worth, it's necessary to be able to create applications for these processors and during application development errors are always made. Debuggers serve to discover and help fixing them. This paper summarises some basic information to debugger development and describes implementation for processors created using the Lissom project.
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Retargetable Source-Level Debugger
Korvas, Pavol ; Dolíhal, Luděk (referee) ; Křoustek, Jakub (advisor)
This mater's thesis deals with introducing principles of debugging and debuggers. The thesis examines in detail format of debugging information and it describes the design of debugger created within the project Lissom. Furthermore, the thesis also contains implementation of each designed part, which the debugger consists of. Last part of this thesis deals with testing of the implemented solution with two types of processor architectures and it also contains the conclusion of the results.
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