National Repository of Grey Literature 145 records found  beginprevious126 - 135next  jump to record: Search took 0.01 seconds. 
Design of the Multicore Processor in VHDL
Novotný, Jaroslav ; Straka, Martin (referee) ; Kaštil, Jan (advisor)
The objective of the thesis is to design and implement in the VHDL language a simple multiprocessor supporting parallel computing. Furthemore, the author has designed and realized universal transparent generic interconnection layer with the objective to connect any given number of processor cores to shared address space using arbitrated bus. Parametrized cache has been allocated to each core in the layer. MSI protocol was used to deal with the issue of memory coherence of the implemented system. Direct and indirect synchornisation support is available to the user. In order to verify the functionality of the system, simple processor core has been designed and implemented, and its copies were connected to the interconnection layer. Various testing programmes have been used to verify the functionality of the system, which also confirmed that the acceleration of computing has been achieved successfully. Virtex6 chip has been used to test the whole system.
Transfer and Backup of Text Messages (SMS)
Černý, František ; Křivka, Zbyněk (referee) ; Kolář, Dušan (advisor)
The subject of this bachelor thesis are two cooperating applications to backup, restore and to view SMS messages. The first of the implemented applications, designed for the Android operating system can backup and restore SMS messages using XML file. The application also enables synchronization of the imported file with existing short text messages. The second application is used as an extension for Thunderbird email client. This extension lets you view imported text messages, synchronize your saved short text messages with contacts in SMS threads, search in saved file and synchronize existing SMS information with newly imported file. The extension also allows exporting a file with SMS messages and uses this exported file in application for Android operating system.
Synchronization of Generator by Applied Synchro-check Relay in Feeder Terminal
Gregr, Tomáš ; Novotný, Jan (referee) ; Orságová, Jaroslava (advisor)
The aim of this work is a theoretical analysis of the parallel operation problems of electrical networks, as well as of the connecting the synchronous alternators to the electric power system. The knowledge of the present methods of connecting the synchronous alternators to the common network, of the historical evolution of this set of problems, of the phase conditions, their permitted deviations, as well as of the actual use of the modern phase automatic equipment, thereafter we to concentrate exclusively on the function of the synchro-check feeder terminal REF 543 produced by the ABB company. A part of this work is the analysis of the transient phenomena, that of accurate phasing, as well as that of phasing during a voltage, frequency and phase shift. Thereafter our goal is to get acquainted with the configuration program CAP 505, to carry out the communication of the REF 543 with PC, creating a new project, its configurating and then transmitting it to the REF 543 terminal. Further we occupy ourselves with the project to adjust the synchronous function synchro-check to phasing. The main task of this work is the proposal and the following testing of the connexion with the aim to test the synchronous function of the REF 543 terminal in cooperation with the output circuit breaker simulated on the test panel from the ABB company. Using the 6-phase generator from the UNIMA-KS company, this will simulate the voltage of the alternator. The network voltage is induced by means of the three-phase autotransformer from the Křižík n.p. company. We end this work up with a detailed description of connecting the terminal to the computer, with its following configuration, with setting up the required values, as well as with connecting the apparatus on order to test the conditions for the correct connection of the whole device.
Web application HelpDesk and data synchronization
Balogh, Pavel ; Heriban, Pavel (referee) ; Šťastný, Jiří (advisor)
The thesis deals with the development of the web-based Helpdesk application which ensures and supports the communication with Internet users. The first section of the thesis contains a brief description of the individual means and tools used by the developer. The practical part describes the design and development of the individual layers of the web-based application concerned. The latter section also mentions the development and usage of the required synchronization and code generation tools.
D/A converter for video signal from FPGA chip
Balcárek, Jan ; Kosina, Petr (referee) ; Bohrn, Marek (advisor)
It’s going on hardware modul, that display our required information on the display unit. This module is controlled with digital logic implemented to FPGA chip. Logic is designed to communication protocol by standard interface VGA.
Information System Assessment and Proposal for ICT Modification
Bogocz, Lukáš ; Janoš, Petr (referee) ; Koch, Miloš (advisor)
The content of this thesis is an analysis of information system and creation an application for the company CID International a.s. This application will be used as a planning tool for creation projects and monitoring workload resources over the tasks including two-way synchronization between company's information system and the application.
Supporting algorithms for electrical motor control
Řezáč, Martin ; Buchta, Luděk (referee) ; Blaha, Petr (advisor)
This thesis is focused on a creating supporting drivers and algorithms for electrical motor control using CPU TriCore TC275 CA. The first part is devoted to processor description and selected peripherals, which are A/D converter, a timer for creating the PWM signals and the second timer for processing singnals from encoder. All drivers are tested on an aplication kit, which is equipped with TC275 CA processor. The second part analyzes the measurement quality of GMR sensor TLE5009. Special testbench was prepared for sin cos data capturing and for their comparison with precise encoder position measurement. It was composed from DC motor having both sensor types on commons shaft. Data are acquired using LabView. Subsequently, it analyzes the sensor data, their compensation and subsequent comparison with measured data from the encoder.
Communication of a Measuring Device with a Computer – Laboratory Experiments
Cigánek, Jan ; Frýza, Tomáš (referee) ; Jakubová, Ivana (advisor)
This project deals with the programme for automated measurement. Project describes main theory advices and possibilities of building programme with language C++. It shows complication in communication of PC with measurement devices and it describes programme commands. This work includes programme, solution, structure with examples of the algorithm and source code. The designed control programme has been applied for automated measurement of frequency characteristics of low-pass and high-pass filters with the analogue multiplier AD 633 using the programmable DC power supply Agilent E3631A, the digital multimeter Agilent 34411A or digital storage oscilloscope Tektronix TDS 1012 and generator Agilent 33220A.
Firmware for the Robotic Vehicle
Otava, Lukáš ; Sojka,, Michal (referee) ; Kučera, Pavel (advisor)
This thesis is focused on a firmware for robotic vehicle based on the ARM Cortex-M3 architecture that is running a real-time operating system (RTOS). Theoretical part describes available solutions of embedded RTOS and concrete HW implementation of the robotic vehicle. There is also comparison of the three selected RTOS with their measurements. Result of this thesis is base firmware compounded by a program modules that controls HW parts. There is also a sample PC and firmware application that extends base firmware. This sample application is able to communicate with robotic vehicle, control wheel motion and measure process data.
OFDM demodulator implementation in FPGA
Solar, Pavel ; Urban, Josef (referee) ; Maršálek, Roman (advisor)
The master's thesis briefly analyses the principle of OFDM modulation, possibilities of the synchronization and channel estimation in OFDM. The simply model of OFDM system is made in MATLAB. Because of the implementation in FPGA is generated the behavioral description of the OFDM demodulator through the combination of the schematics description and the description in the VHDL language. The ISE development environment is used.

National Repository of Grey Literature : 145 records found   beginprevious126 - 135next  jump to record:
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