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RISC-V microprocessor implementation with bit manipulations instruction set extension
Chovančíková, Lucie ; Bohrn, Marek (referee) ; Pristach, Marián (advisor)
This master thesis deals with the design of a RISC-V processor with bit manipulations instruction set extension. In this work, attention is paid to the description of the RISC-V instruction set and the CodAL language, which is used to describe the instruction sets and the processor architectures. The main goal of this work is to implement a model with a 32-bit address space, RISC-V basic instruction set and bit manipulations instruction set. The processor's design have two models, which one is instruction model and second is RTL model. The resulting parameters of the designed processor are measured using a Genus Synthesis Solution tool. The usability of bit manipulations based on decoder coverage is also included in the measurement.
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Advanced Techniques of C-to-HDL Tranformations
Michalik, Martin ; Křoustek, Jakub (referee) ; Přikryl, Zdeněk (advisor)
This thesis deals with proposal and implementation of advanced transformations used du- ring generation HDL from behavior description written in C language, which is part of architecture specification in CodAL language. These transformations focus either on the reduction of time required for execution, increasing frequency or area reduction of target hardware. This thesis discusses main problems of C to HDL transformation and describes principles and analysis of proposed transformations. Transformations results are discussed based on the visualisation of control data flow and register transfer level graphs, simulation of generated VHDL source files in the ModelSim software and synthesis of these source files for target FPGA Vertix 5 in the Xilinx ISE software.
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MicroBlaze processor implementation using CodAL language
Hájek, Radek ; Zachariášová, Marcela (referee) ; Pristach, Marián (advisor)
The diploma thesis contains theoretical basis, classification and function of processors. It summarizes the principle of pipelined instruction processing and the types of hazards in the microarchitecture of the processor. It also introduces design of processors using CodAL language developed by Codasip company. In the practical part of the thesis the model of MicroBlaze core developed by Xilinx company was described in the CodAL language. Designed model was tested and implemented into the FPGA device as practical example.
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NIOS II Processor Model
Masařík, Marek ; Dolíhal, Luděk (referee) ; Zachariášová, Marcela (advisor)
This bachelor thesis deals with the implementations of Nios II processor model in the description language processor called description CodAL. The implementation of processor is on two levels of abstraction. First level of abstraction is the instruction accurate model and second is the cycle accurate model. An important part of processor design is testing and verification which were realized on the prepared benchmark set. The resulting processor can be potentially used in real applications.
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Modelling of PowerPC Processor
Blaha, Hynek ; Dolíhal, Luděk (referee) ; Masařík, Karel (advisor)
Processor architectures are becoming increasingly complex, so great emphasis is put on the automation of their desings. This bachelor thesis describes the design of the PowerPC processor architecture in Codal language. The model is created according to avaliable documentation. The functionality and efficiency of the model was verified by tests provided by research group Lissom and compared to current competitor.
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Dynamic Reconfiguration of Hardware Accelerators
Brabec, Lukáš ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
Thesis deals with usage of dynamic reconfiguration of FPGA in area of application specific instruction-set processors, considerng time-to-market, possibilities of acceleration and universality. Furthermore, it is designed an extension of application specific processor Codix with reconfigurable unit and it is described its implementation. Finally, the results are evaluated and opportunities for further development are identified.
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Acceleration of Applications Using Specialized Instructions
Mikó, Albert ; Krčma, Martin (referee) ; Hruška, Tomáš (advisor)
The design of specialized instructions for application specific processors is a challenging task. This thesis describes the issues of effective specification and use of specialized instructions for optimization of applications. It focuses on improvements of the outputs and usability of the semiatomatic method of selection of specialized instructions to allow the optimization of complicated applications. This method combines manual selection of instructions by marking a section of source code in the application and automatic generation of the instruction description in the modelling language.
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Processor Models Creation Using ADL Language
Steinhauser, Dominik ; Hynek, Jiří (referee) ; Hruška, Tomáš (advisor)
Goal of this bachelor thesis is to create instruction level models of two processors Tensilica Xtensa and Sparc Leon. Models were implemented in CodAL language. Development, simulation and testing took place in Codasip Studio, an IDE developed by Codasip company. Application Specific Instruction-Set Processors can be implemented from scratch or already implemented processor can be modified to meet needs of specific aplication. My models will be added to portfolio of Codasip company to be used and modified by the user of Codasip Studio. Result of this work are tested models of these two processors. Simulator, assembler and C language compiler of these processors can be generated. Models were compared by several Benchmark tests and results were analyzed.
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RISC-V Model Creation
Nosterský, Milan ; Zachariášová, Marcela (referee) ; Hruška, Tomáš (advisor)
This bachelor thesis deals with the implementations of RISC-V processor model in the language for architecture description CodAL. The theoretical part of thesis is focused on the description of CodAL language and classification of processors. The practical part of thesis deals with the implementation of processor RISC-V on instruction accurate level and the model testing. The thesis also deals with the implementation of MMU, timer and analysis of the proxy kernel.
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CodAL Language Editor in Eclipse Framework
Hynek, Jiří ; Dolíhal, Luděk (referee) ; Přikryl, Zdeněk (advisor)
The Master thesis is focused on creation of an editor of CodAL language for the development toolkit of the project Lissom which is based on Eclipse framework. The goal of this thesis is to analyze the problem of editor creation and the features in existing editors which add some value to their usability. The outline of parser creation and subsequent code analysis of the source codes written into the editor is described in the theoretical part. It also explains the syntax and semantic aspects of the CodAL language. In the practical part the new CodAL language editor is designed and developed. The new CodAL language editor integrated into the development toolkit of the project Lissom is the final outcome of this thesis.
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