National Repository of Grey Literature 9,649 records found  1 - 10nextend  jump to record: Search took 0.28 seconds. 

Differences in CO2 Extraction of Vegetable Oils, Essential Oils, and Minor Components from Plants
Sovová, Helena
Significant progress in understanding the phenomena that control supercritical fluid extraction from plants was made in the last years and is reflected in the literature. Combination of chemical engineering approach and botanical knowledge has appeared to be fruitful for the choice of extraction model and even for the prediction of extraction kinetics. This contribution refers to the papers utilizing knowledge of plant microstructure and location of extracted substances together with extraction equilibrium and attempts to specify the differences among extraction kinetics of vegetable oils, essential oils, and other substances. The most abundant substances like vegetable oils in seeds can be regarded in first approximation as non-interacting with plant matrix, in contrast to the minor components whose equilibrium concentration in CO2 is affected by their adsorption on matrix and often also by co-extracted substances.
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Design of methodology of administration and management of issues and its application in chosen organisation
Holub, Adam ; Stanovská, Iva (advisor) ; Novák, Tomáš (referee)
This thesis is focused on design methodology of administration and management of issues, using issue-tracking system. The objective is to create such methodology and deploy it to specific organization. During methodology creation, there were used best practices, acquired from source thesis and authors experiences. In theoretical part of thesis are described approaches, witch is this thesis based on. Then thesis describes what issue-tracking system is and lists mostly used issue-tracking systems. In practical part, the methodology itself is created. At first, target group is described. Then, types of issuse and roles used in issue-tracking system are described. Then is described, how to create lifecycle of issue and how to handle with its attributes. Last part is focused on data reporting from issue-tracking system. Last chapter of practical part describes how to implement methodology to issue-tracking system JIRA.

Design of a methodology for BI solutions in QlikView environment
Judová, Eva ; Pour, Jan (advisor) ; Kunst, Jan (referee)
This master thesis is devoted to a design for methodology of BI projects in QlikView. The main aim is to propose a recommended procedure solutions reflecting the strengths and weaknesses in the development of QlikView applications. Accompanying chapter to the discussed issue is a chapter Business Intelligence which explains the principles, characteristics and reasons for implementation in companies. Part of defining the differences between traditional and self-service solutions serves as a theoretical basis for understanding the increasing attractiveness of self-service solutions and environment of the proposed methodology. The next chapter presents the company Qlik as a market leader in BI and the owner of QlikView. The reasons for its establishment, subsequent development and actual vision are listed to create a comprehensive view of the environment where the described product was created. Along with the chapter focusing on characteristics and main advantages of QlikView a knowledge base is established for the implementation of proposed methodology. Crucial chapter of this thesis is based on the author's experience gained while implementing QlikView projects. The proposed methodology is based on the description of each phase, its activities, inputs and outputs and its concrete application in a demo environment for the area of receivables in manufacturing company. The key contribution of the author is pointing out potential problems during development or warning about critical parts or providing appropriate recommendations and benefits of the proposed procedures. The designed methodology can serve as a useful guide for self-service projects implemented the QlikView environment.

Řízení IS/ICT se zaměřením na sourcing služeb informačního systému
Šebesta, Michal ; Voříšek, Jiří (advisor) ; Havlíček, Zdeněk (referee) ; Příklenk, Oldřich (referee) ; Král, Jaroslav (referee)
Research on outsourcing has been around for several decades, while recent evolution in the information systems discipline towards ICT service commoditization significantly changes the context of decision-making. Services that are available on-demand via the Internet allow organizations implementing functions they demand in a fraction of time. This trend represents a chance for organizations seeking to use advanced ICT services without a need of major investments. Problem is the current lack of guidelines and tools for managing ICT services and their outsourcing. Given the trends on the ICT service market, it is expected that much of the IT management in the future will encompass the ICT services and utilize service-level structures. Methods currently available are either too broad or encompass only small part of the whole problem. Ad-hoc or unsound decisions in this area might cause major complications in terms of quality, usability, integration, and consequently influence total cost of organizational IT. Organizations need to either revise existing models or propose and implement completely new models to manage their IS/ICT. This thesis deals with the management of IS/ICT with focus on the ICT services outsourcing. It discusses available sourcing models in the literature and links them to the various interconnected areas. Based on these areas, it presents an integrated view on IT outsourcing strategies. Most importantly the thesis proposes an original concept for decision-making about outsourcing of ICT services named the SOURCER framework. This approach utilizes the presented outsourcing strategies, and introduces a complex methodology and decision-making criteria that will assist organizations with selection of ICT services in order to maintain and manage a most suitable ICT service portfolio. The decision-making is based on four essential viewpoints: function, costs, time, and quality. These viewpoints are discussed, individually analyzed, and serve as a basis for further research. The whole framework is developed and validated according to Design Science Research Methodology (DSRM). Individual components are evaluated using a survey among a group of selected IT managers. Proof of concept is then established by a case study on framework use in a real organization. This case study covers strategy specification, business--IT alignment, specifying service architecture and its interconnections, outsourcing, and management of the ICT service portfolio.

Geodiversity values as a basis for geosite and geomorphosite assessment: a case study from Žďárské vrchy Highland
Bajer, A. ; Kirchner, Karel ; Kubalíková, L.
Paper presents geodiversity values, geodiversity is understood as a set of geological, geomorphological and pedological components, including systems consisting of this components and geological, geomorphological and pedological processes. Geodiversity values are analyzed in relation to ecosystem values (e.g. cultural, functional value). Geodiversity values were used as basis for a methodical approach to geosite and geomorphosite assessment. Methodological approach is presented at selected sites in the top part of the Žďárské vrchy Highland. The acquired results can serve as a basis for geoconservation of PLA Žďárské vrchy, development of geotourism as well as an offer for extension geoeducational activities.\n

New Methods for Increasing Efficiency and Speed of Functional Verification
Zachariášová, Marcela ; Dohnal, Jan (referee) ; Steininger, Andreas (referee) ; Kotásek, Zdeněk (advisor)
Při vývoji současných číslicových systémů, např. vestavěných systému a počítačového hardware, je nutné hledat postupy, jak zvýšit jejich spolehlivost. Jednou z možností je zvyšování efektivity a rychlosti verifikačních procesů, které se provádějí v raných fázích návrhu. V této dizertační práci se pozornost věnuje verifikačnímu přístupu s názvem funkční verifikace. Je identifikováno několik výzev a problému týkajících se efektivity a rychlosti funkční verifikace a ty jsou následně řešeny v cílech dizertační práce. První cíl se zaměřuje na redukci simulačního času v průběhu verifikace komplexních systémů. Důvodem je, že simulace inherentně paralelního hardwarového systému trvá velmi dlouho v porovnání s během v skutečném hardware. Je proto navrhnuta optimalizační technika, která umisťuje verifikovaný systém do FPGA akcelerátoru, zatím co část verifikačního prostředí stále běží v simulaci. Tímto přemístěním je možné výrazně zredukovat simulační režii. Druhý cíl se zabývá ručně připravovanými verifikačními prostředími, která představují výrazné omezení ve verifikační produktivitě. Tato režie však není nutná, protože většina verifikačních prostředí má velice podobnou strukturu, jelikož využívají komponenty standardních verifikačních metodik. Tyto komponenty se jen upravují s ohledem na verifikovaný systém. Proto druhá optimalizační technika analyzuje popis systému na vyšší úrovni abstrakce a automatizuje tvorbu verifikačních prostředí tím, že je automaticky generuje z tohoto vysoko-úrovňového popisu. Třetí cíl zkoumá, jak je možné docílit úplnost verifikace pomocí inteligentní automatizace. Úplnost verifikace se typicky měří pomocí různých metrik pokrytí a verifikace je ukončena, když je dosažena právě vysoká úroveň pokrytí. Proto je navržena třetí optimalizační technika, která řídí generování vstupů pro verifikovaný systém tak, aby tyto vstupy aktivovali současně co nejvíc bodů pokrytí a aby byla rychlost konvergence k maximálnímu pokrytí co nejvyšší. Jako hlavní optimalizační prostředek se používá genetický algoritmus, který je přizpůsoben pro funkční verifikaci a jeho parametry jsou vyladěny pro tuto doménu. Běží na pozadí verifikačního procesu, analyzuje dosažené pokrytí a na základě toho dynamicky upravuje omezující podmínky pro generátor vstupů. Tyto podmínky jsou reprezentovány pravděpodobnostmi, které určují výběr vhodných hodnot ze vstupní domény. Čtvrtý cíl diskutuje, zda je možné znovu použít vstupy z funkční verifikace pro účely regresního testování a optimalizovat je tak, aby byla rychlost testování co nejvyšší. Ve funkční verifikaci je totiž běžné, že vstupy jsou značně redundantní, jelikož jsou produkovány generátorem. Pro regresní testy ale tato redundance není potřebná a proto může být eliminována. Zároveň je ale nutné dbát na to, aby úroveň pokrytí dosáhnutá optimalizovanou sadou byla stejná, jako u té původní. Čtvrtá optimalizační technika toto reflektuje a opět používá genetický algoritmus jako optimalizační prostředek. Tentokrát ale není integrován do procesu verifikace, ale je použit až po její ukončení. Velmi rychle odstraňuje redundanci z původní sady vstupů a výsledná doba simulace je tak značně optimalizována.

Digital circuits test optimization by multifunctional components
Stareček, Lukáš ; Gramatová, Elena (referee) ; Kubátová, Hana (referee) ; Kotásek, Zdeněk (advisor)
This thesis deals with the possibilities of digital circuit test optimization using multifunctional logic gates. The most important part of this thesis is the explanation of the optimization principle, which is also described by a formal mathematical apparatus. Based on this apparatus, the work presents several options. The optimization of testability analogous to inserting test points and  simple methodology based on SCOAP is shown. The focus of work is a methodology created to optimize circuit tests. It was implemented in the form of software tools. Presented in this work are the results of using these tools to reduce the test vectors volume while maintaining fault coverage on various circuits, including circuits from the ISCAS 85 test set. Part of the work is devoted to the various principles and technology of creating multifunctional logic gates. Some selected gates of these technologies are subject to simulations of electronic properties in SPICE. Based on the principles of presented methodology and results of multifunctional gates simulations, analysis of various problems such as validity of the modified circuit test and the suitability of each multifunctional gate technology for the methodology was also made. The results of analysis and experiments confirm it is possible for the multifunctional logic gate to optimize circuit diagnostic properties in such a way that has achieved the required circuit test parameter modification with minimum impact on the quality and credibility of these tests.

Test Application Methodology Based On the Identification of Testable blocks
Herrman, Tomáš ; Plíva, Zdeněk (referee) ; Racek, Stanislav (referee) ; Kotásek, Zdeněk (advisor)
The PhD thesis deals with the analysis of digital systems described on RT level. The methodology of  data paths analysis is decribed, the data path controller analysis is not solved in the thesis. The methodology is built on the concept of Testable Block (TB) which allows to divide digital component to such segments which can be tested through their inputs/outputs, border registers and primary inputs/outputs are used for this purpose. As a result, lower number of registers is needed to be included into scan  chain - border registers are the only ones which are scanned.  The segmentation allows also to reduce the volume of test vectors, tests are generated for segments, not for the complete component. To identify TBs, two evolutionary algorithms are used, they operate on TB formal model which is also defined in the thesis.

Methodology of highly reliable systems design
Straka, Martin ; Gramatová, Elena (referee) ; Racek, Stanislav (referee) ; Kotásek, Zdeněk (advisor)
In the thesis, a methodology alternative to existing methods of digital systems design with increased dependability implemented into FPGA is presented, new features which can be used in the implementation and testing of these systems are demonstrated. The research is based on the use of FPGA partial dynamic reconfiguration for the design of fault tolerant systems. In these applications, the partial dynamic reconfiguration can be used as a mechanism to correct the fault and recover the system after the fault occurrence. First, the general principles of diagnostics, testing and digital systems dependability are presented including a brief description of FPGA components and their architectures. Next, a survey of currently used methods and techniques used for the design and implementation of fault tolerant systems into FPGA is described, especially the methods used for fault detection and localization, their correction, together with the principles of evaluating fault tolerant systems design quality.  The most important part of the thesis is seen in the description of the design methodology, implementation and testing of fault tolerant systems implemented into FPGAs which uses SRAMs as the configuration memory. First, the methodology of developing and automated checker components design for digital systems and communication protocols is presented. Then, a reference architecture of a dependable system implemented into FPGA is demonstrated including several fault tolerant architectures based on the use of partial dynamic reconfiguration as the mechanism of fault correction and the recovery from it. The principles of controlling the reconfiguration process are described together with the description of the test platform which allows to test and verify the design of fault tolerant systems based on the methodology presented in the thesis. The experimental results and the contribution of the thesis are discussed in the conclusions.

Methodology of highly reliable systems design
Straka, Martin ; Kotásek, Zdeněk (advisor)
In the thesis, a methodology alternative to existing methods of digital systems design with increased dependability implemented into FPGA is presented, new features which can be used in the implementation and testing of these systems are demonstrated. The research is based on the use of FPGA partial dynamic reconfiguration for the design of fault tolerant systems. In these applications, the partial dynamic reconfiguration can be used as a mechanism to correct the fault and recover the system after the fault occurrence. First, the general principles of diagnostics, testing and digital systems dependability are presented including a brief description of FPGA components and their architectures. Next, a survey of currently used methods and techniques used for the design and implementation of fault tolerant systems into FPGA is described, especially the methods used for fault detection and localization, their correction, together with the principles of evaluating fault tolerant systems design quality.  The most important part of the thesis is seen in the description of the design methodology, implementation and testing of fault tolerant systems implemented into FPGAs which uses SRAMs as the configuration memory. First, the methodology of developing and automated checker components design for digital systems and communication protocols is presented. Then, a reference architecture of a dependable system implemented into FPGA is demonstrated including several fault tolerant architectures based on the use of partial dynamic reconfiguration as the mechanism of fault correction and the recovery from it. The principles of controlling the reconfiguration process are described together with the description of the test platform which allows to test and verify the design of fault tolerant systems based on the methodology presented in the thesis. The experimental results and the contribution of the thesis are discussed in the conclusions.