National Repository of Grey Literature 33 records found  1 - 10nextend  jump to record: Search took 0.00 seconds. 
Compiler of a Language with User-Defined Syntax for New Constructs
Kuklínek, Lukáš ; Křivka, Zbyněk (referee) ; Kolář, Dušan (advisor)
Tato práce si klade za cíl navrhnout a implementovat experimentální programovací jazyk s podporou uživatelsky definovaných syntaktických konstrukcí. Nový jazyk je kompilován do nativní binární podoby a vyžaduje statickou typovou disciplínu v době překladu. Jazyk se skládá ze dvou hlavních komponent. První z nich je minimalistické jádro založené na principech zásobníkově orientovaných jazyků. Druhou částí je mechanismus pro definici nových syntaktických konstrukcí uživatelem. Poté jsou shrnuty poznatky nabyté při návrhu a experimentování s prototypem překladače tohoto jazyka.
Decompilation of Specialized and Advanced Instruction Sets
Holub, Juraj ; Kolář, Dušan (referee) ; Křivka, Zbyněk (advisor)
V dnešnej dobe je proces analýzy nebezpečného softvéru dôležitou súčasťou informačných technológií. Jedna z kľúčových techník je spätný preklad škodlivých binárnych programov. Spätný preklad je komplexný proces, ktorý rieši niekoľko projektov. Projekt RetDec sa zameriava na flexibilný návrh a riešenie spätného prekladača s možnosťou znovupoužiteľnosti. Cieľom tejto práce je zlepšenie spätného prekladu pokročilých inštrukčných sád pre architektúru x86. Bola navrhnutá nová optimalizácia pre FPU registrový zásobník. Bola rozšírená podpora prekladu inštrukčných sád jednotiek FPU a SSE. Nové rozšírenia boli implementované a otestované z hľadiska efektivity a kvality spätného prekladu.
Systems of Sequential Grammars Applied to Parsing
Repík, Tomáš ; Solár, Peter (referee) ; Meduna, Alexandr (advisor)
This thesis examines Grammar systems as the potentially more powerful tool for parsing as the simple grammars. The intention is to adapt theoretical models of grammar systems for parsing. New methods are introduced, with focus on determinism in order to prevent backtracking during parsing. The basis for the parser is a cooperating distributed grammar system. The implementation uses predictive, top-down parsing method, LL(1)Tables, and recursion as well. The parser is universal, usable for any LL-Grammar and for any grammar system based on them.
Plugins for Getting Information about the System for BusyBox
Poláček, Marek ; Konečný, Filip (referee) ; Vojnar, Tomáš (advisor)
In this thesis, we discuss implementation of tools for getting information from the system.  We examine file systems sysfs and procfs in the Linux operating system.  Furthermore, we discourse how to write small programs in the C language.  Eventually, we take a look at implementation of tools like iostat, mpstat and powertop.  These tools were implemented in a minimalistic form suitable for Busybox within this thesis.
A Bit-Vector Compiler for Data-Flow Graphs
Sušovský, Tomáš ; Lengál, Ondřej (referee) ; Smrčka, Aleš (advisor)
The principal goal of this bachelor thesis is to design and implement a tool for compiling data-flow graph models to SMT-LIB format. This thesis builds on the research project HADES developed by VeriFIT research group of the Faculty of Information Technology, Brno University of Technology. The solution uses compiler for generating object model from original graph. Object model can be converted to a SMT-LIB format description including assertions of the desired system properties. Loop unrolling method (with user defined boundary for unrollment) is used for verification of system properties depending on changes in state of model. Capabilities of the developed tool are demonstrated on set of data-flow graphs models. Models cover usage of all elements defined in VAM language (input format) and their combinations. Result of this thesis presents new ways of processing data-flow graphs in VAM format and their verification.
Transformation of Processor Graphical Representation to the Architecture Description Language
Netočný, Ondřej ; Husár, Adam (referee) ; Hruška, Tomáš (advisor)
This thesis deals with conversion between graphical and text representation of processor architecture. The aim is to acquaint with both of said tools and introduce the way how the conversion is done. The introduction of EMF and GMF tools of Eclipse IDE is also included in this thesis, because the graphical representation editor is based on these tools. The end of thesis is devoted to reverse transformation possibilities, where the intelligent placing of diagram nodes is required.
An Extension of the C Plus Programming Language and Its Compiler
Opatřil, Petr ; Kučera, Jiří (referee) ; Meduna, Alexandr (advisor)
This thesis describes continuing development of new programming language C Plus conceived in earlier Bachelor’s Thesis oriented on enhancing C language with high level constructs with no additional cost. During development, several important languages were compared and C Plus along with its grammar were expanded, advantages of additions were discussed and compared with solutions in other languages. Described enhancements were implemented in the compiler.
Language for Procedural Generation
Dobiáš, Roman ; Káčerik, Martin (referee) ; Milet, Tomáš (advisor)
This thesis deals with designing and implementing a library with language devoted to procedural generation extending L-systems. Emphasis is put on practical usage of the library which is aimed to be used by a wide spectrum of real-world applications, especially by 3D rendering engines and editors. The thesis covers theory of procedural generation, L-systems, theory of compilers, and design and implementation of the library. In conclusion, case study projects are introduced which embed the library and numerous examples are given.
Testing of generated C compilers for processors in embedded systems
Dolíhal, Luděk ; Kubátová, Hana (referee) ; Vojnar, Tomáš (referee) ; Hruška, Tomáš (advisor)
Vestavěné systémy se staly nepostradatelnými pro náš každodenní život. Jsou to obvykle úzce zaměřená, vysoce optimalizovaná, jednoúčelová zařízení. Jádro vestavěných zařízení obvykle tvoří jeden nebo více aplikačně specifických instrukčních procesorů. Tato disertační práce se zaměřuje na problematiku testování nástrojú pro návrh aplikačně specifických procesorů a následně i samotných aplikačne specifických procesorů. Snahou bylo vytvořit systém, ve kterém bude možné otestovat jednotlivé nástroje, jako například překladač, assembler, disassembler, debugger. Nicméně vyvstává také potřeba provádět složitější testy, například integrační, které zaručí, že mezi jednotlivými nástroji nevzniká nekompatibilita. Autor vytvořil s podporou přůběžně integračního serveru prostředí, které napomáhá odhalování a odstraňování chyb při návrhu aplikačně specifických procesorů a které je navíc do značné míry automatizované.
Systems of Transducers: Definition, Properties, and Applications
Řezáč, Michal ; Kövári, Adam (referee) ; Meduna, Alexandr (advisor)
Currently, finite and pushdown automata are used to describe programming language compilers as two separate parts. This thesis aims to define a system of transducers that allows to describe a compiler by one aggregate system, instead of two independent transducers. The system of transducers presented in this paper is based on finite and pushdown transducers. It is a simple model without internal communication. Because of this property, it is not suitable for compiler formalization but because of its simplicity, the system is easily extensible with new features and can thus serve as a basis for further research.

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