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System for Guarding and Securing of Automobiles
Široký, Vít ; Straka, Martin (referee) ; Strnadel, Josef (advisor)
This thesis discusses problem of guarding and securing automobiles. It starts by description of autocrime, continues by discussing about different ways of securing cars. Next, there is concept of my system and description of system realization with low power consumption. Special part of this chapter discusses ways of realization in my old Škoda Favorit car. Last chapter discusses some possibilities of extensions.
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Controller for the Model Railway Based on FITKit
Kandrik, Ján ; Kotásek, Zdeněk (referee) ; Straka, Martin (advisor)
This work discusses a controller for model railroad derived from a state-of-art railway interlocking system, electronic signalbox. Work of interlocking and model railroad signalling issues are described among the design and implementation parts of such system. Also analyses creation of parts for the controller using FITkit, a microcontroller educational platform.
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RAM-Tester Design in VHDL
Charvát, Jiří ; Straka, Martin (referee) ; Strnadel, Josef (advisor)
This paper describes various approaches to hardware testing semiconductor memory. We describe the priciple of basic memory types, the way which each of them stores information and their comunication protocol. Following part deals with common failures which may occur in the memory. The section also describes the implementation of memory model and tester designed in VHDL language. It is possible to inject some errors into memory, which are later detected by the tester. The final section shows the response of tester to various error types according to used error detection method. The paper is especially focused on failure detection by variants of march test.
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PCI Bus Controller for Development Board with FPGA
Ilavský, Ľubomír ; Straka, Martin (referee) ; Šimek, Václav (advisor)
This thesis deals with the communication on the PCI bus and the design of controllers for the PCI card with FPGA circuit. The introduction shows the functionality and structure of FPGA circuits, followed by description of the principle of communication through the PCI bus. After an analysis of the PCI the thesis describes a design of controllers for a target card and lets the reader get acquainted with its different parts. In the process of implementation carefully examines the structure and operation of individual blocks of PCI controller. In the following part the thesis shows the process of implementation and testing of the final solution using the educational card with FPGA circuit.
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Design of the Multicore Processor in VHDL
Novotný, Jaroslav ; Straka, Martin (referee) ; Kaštil, Jan (advisor)
The objective of the thesis is to design and implement in the VHDL language a simple multiprocessor supporting parallel computing. Furthemore, the author has designed and realized universal transparent generic interconnection layer with the objective to connect any given number of processor cores to shared address space using arbitrated bus. Parametrized cache has been allocated to each core in the layer. MSI protocol was used to deal with the issue of memory coherence of the implemented system. Direct and indirect synchornisation support is available to the user. In order to verify the functionality of the system, simple processor core has been designed and implemented, and its copies were connected to the interconnection layer. Various testing programmes have been used to verify the functionality of the system, which also confirmed that the acceleration of computing has been achieved successfully. Virtex6 chip has been used to test the whole system.
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Conceptual design of two-seat high performance car
Straka, Martin ; Blaťák, Ondřej (referee) ; Porteš, Petr (advisor)
is diploma thesis deals with design concept of two-seater sports car with the main focus on chassis torsional stiffness and axle kinematics. The main idea started with some paper sketches which were later transferred to the 3D model with all the main parts (engine, differential, driver etc.) using CATIA V5 design program. Then the torsional stiffness was counted using FEM software ANSYS 12.0. Finally the axis geometry during bump/rebump movement of the wheel was simulated in MBS system ADAMS 2007.
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Evolution Algorithm Used in Chess Game
Urminský, Andrej ; Straka, Martin (referee) ; Gajda, Zbyšek (advisor)
This thesis deals with a design of an evolutionary algorithm for an artificial intelligence in a chess game. This is accomplished by use of so called genetic algorithms. Java programming language and Eclipse, an open development platform, were used for implementation of this algorithm and the graphical user interface.
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Computational modelling of high-frequency noise inside cabin of aircraft EV-55M
Straka, Martin ; Pellant, Karel (referee) ; Švancara, Pavel (advisor)
This thesis describes methods of high frequency noise and vibrations computation of cabin part of EV–55M (aircraft developed by Evektor Kunovice). There is a brief summary of methods used for determining high frequency noise and vibrations in the first part of the thesis. Detailed explanation is given for Statistical Energy Analysis (SEA) which is nowadays the most dominant method in this area. The energy balance equation is derived in this chapter and SEA parameters such as modal density, damping loss factor, coupling loss factor and power input are introduced here. Next part deals with main noise sources of propeller driven and jet aircraft and passive and active noise controls are discussed. Practical part of this thesis deals with modeling aircraft EV–55M fuselage using VA One SEA module. Two models were created. First of them is only an outside fuselage with aircraft flooring and the second one is extended by interior trim panels and is applicable for simulation of noise control treatments. Computational modeling is accompanied by experimental measurement of passive noise control material characteristics. Postprocessing of information obtained from impedance tube measurement was performed in FOAM – X. Determined characteristics of porous material were used as inputs to VA One and reduction of sound pressure level in fuselage cavities by using noise control treatment was found. In conclusion there is a summary of noise transmission paths from sources to interior cavity and some treatments of them are simulated
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Web Planning System
Mátl, Tomáš ; Květoňová, Šárka (referee) ; Straka, Martin (advisor)
This work deals with creation of an information system for web planning. The work involves each phase of system development from the first requirements specification and analysis to system planning, modeling and implementation. System was implemented using technologies such as HTML, CSS, PHP, Javascript, MySQL database and Apache web server.
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Web Portal for VHDL Core Generator
Poupě, Petr ; Kaštil, Jan (referee) ; Straka, Martin (advisor)
In this Bachelor thesis, activities which aim at developing web portal for an intuitive access to VHDL core generators are presented. The basic principles of methodology for generating VHDL descriptions of hardware checkers for communication protocols and RTL circuits are demonstrated together with their impact on the fault tolerant architectures. The main goal of this work is to develop user-friendly web environment which would facilitate the use of VHDL core generators. The specification and features of web portal are described together with implementation details and testing of final application. As the results of this thesis, the web portal based on PHP and MySQL database was created.
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