|
|
RISC-V Model Creation
Nosterský, Milan ; Zachariášová, Marcela (referee) ; Hruška, Tomáš (advisor)
This bachelor thesis deals with the implementations of RISC-V processor model in the language for architecture description CodAL. The theoretical part of thesis is focused on the description of CodAL language and classification of processors. The practical part of thesis deals with the implementation of processor RISC-V on instruction accurate level and the model testing. The thesis also deals with the implementation of MMU, timer and analysis of the proxy kernel.
|
|
|
NIOS II Processor Model
Masařík, Marek ; Dolíhal, Luděk (referee) ; Zachariášová, Marcela (advisor)
This bachelor thesis deals with the implementations of Nios II processor model in the description language processor called description CodAL. The implementation of processor is on two levels of abstraction. First level of abstraction is the instruction accurate model and second is the cycle accurate model. An important part of processor design is testing and verification which were realized on the prepared benchmark set. The resulting processor can be potentially used in real applications.
|
|
|
Membraneless speaker
Kovář, Josef ; Šteffan, Pavel (referee) ; Pavlík, Michal (advisor)
The bachelor thesis consists of theoretic basics and describes the design and construction of one-channel membraneless speaker. Absence of mechanical components gives the membraneless speaker no frequency limitation. The design consists of power source, control electronics, which modulates the signal, convertor and output transformer. The power source is realized by transformer, which lowers the voltage and stabilizators. Modulation is provided by integrated circuit TL 594, its duty is adjusted by potentiometer P1 and frequency by potentiometer P2. Power conversion provides dual forward converter. As a output transformer was used transformer from color television.
|
|
|
AVR microprocessor implementation on FPGA
Hájek, Radek ; Dvořák, Vojtěch (referee) ; Pristach, Marián (advisor)
This bachelor‘s thesis deals with FPGA implementation of Atmel AVR core described using VHDL language. Basic architecture concepts and processor addressing modes are summarized in this thesis. The core including several peripherals was designed to be compatible with ATtiny26 architecture and instruction set. The microprocessor was described in VHDL and verified in several types of tests.
|
|
|
Processor Overclocking
Horký, Jan ; Adámek, Martin (referee) ; Novotný, Radovan (advisor)
The aim of bachelor's thesis was to describe and explain processor overclocking and its use. Suitable processor was chosen and its operational frequency was increased by increasing value of multiplier and changing frequency of FSB. Multiplier and frequency of FSB were increased by the smallest step, which motherboard allowed, to value when computer was unstable. Processor was tested by stress and performance tests for each frequency. Change of power consumption was also measured. At the end, both methods were compared.
|
|
|
Connecting external devices with Freescale MC9S08LH64 microcontroller by IIC and SPI bus
Pamánek, David ; Holek, Radovan (referee) ; Macho, Tomáš (advisor)
The content of this thesis is to introduce the SPI and IIC serial buses, their properties and description of their function. After this part there is the description of the microcontroller Freescale MC9S08LH. It gives the basic description of whole device and more detailed description of SPI and IIC modules. In the next part of the document there is described four external devices, which I have chosen. For each device there is shown connetion diagram and printed circuit board. In the end of this document is description of libraries created for communication between chosen devices and microcontroller.
|
|
|
MicroBlaze processor implementation using CodAL language
Hájek, Radek ; Zachariášová, Marcela (referee) ; Pristach, Marián (advisor)
The diploma thesis contains theoretical basis, classification and function of processors. It summarizes the principle of pipelined instruction processing and the types of hazards in the microarchitecture of the processor. It also introduces design of processors using CodAL language developed by Codasip company. In the practical part of the thesis the model of MicroBlaze core developed by Xilinx company was described in the CodAL language. Designed model was tested and implemented into the FPGA device as practical example.
|
|
|
Smart Wearable
Moravec, Luboš ; Macháň, Ladislav (referee) ; Šteffan, Pavel (advisor)
This master’s thesis deals with the explanation of the concept of smart wearables and the different application possibilities. This work also includes examples of finished demonstration devices in this category. Part of this work is devoted to guide the selection of appropriate components for the design of new equipment in the category of smart wearable. The result of this thesis is designed wearable and charging station. This device is able to read user input and display that information on a smart device running under Android system connected via Bluetooth technology.
|
|
|
High Voltage Pulse Generator for Electroporation of Cells
Puczok, Václav ; Martiš, Jan (referee) ; Červinka, Dalibor (advisor)
The main goal of this thesis is to design control board for the experimental electroporation device and to develop control firmware. The first chapter of this work focuses on the electroporation phenomenon itself. Behaviour of the cell model in external electrical field is described there as well as simulation and overview of how electroporation affects living tissue. It also explains the main requirements for parameters of the electroporation pulses as well as need for ECG synchronization. Furthermore, some remarks are given about novel high frequency electroporation method, which involves use of nanosecond bipolar high voltage pulse bursts. The second chapter briefly introduces commercial electroporation device called Nanoknife, including control part, power part, and it's limits. The third chapter consists of introduction of the novel experimental electroporation device developed at BUT. Power part of this device is discussed as well. Next chapter focuses on design of the control board for this device and also on description of the particular schematic parts. There is a control algorithm explanation in the fifth chapter of this thesis followed by the brief manual to machine operation.
|
|
|
Universal BLDC motor controller
Pijáček, Ondřej ; Pohl, Lukáš (referee) ; Veselý, Libor (advisor)
This thesis describes the design of universal control unit for BLDC motor powered from airplane power distribution system of 28 V capable of driving motor up to 10 A. The maximal engine power is about 250 W. Important prerequisite is possibility of driving various motor size without needs of changing wiring board using only the configuration in the auxiliary memory unit. To control different motors is enough one unit with one program without any way to interfere to the unit itself.
|
guest ::
