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Application Protocols Testing In Jmeter
Srnec, Tomáš
This paper deals with stress testing of HLS (HTTP Live Streaming) and RTSP (Real Time Streaming Protocol) protocols utilizing Apache JMeter application. The main goal lies in design and implementation of plug-in module, that will performs server stress tests of the above-mentioned protocols.
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Video on Demand Protocols Testing using Apache JMeter
Srnec, Tomáš ; Smékal, David (referee) ; Číka, Petr (advisor)
The master’s thesis deals with testing the application protocol HLS and RTSP in JMeter program. The aim of this thesis is to design and implement a test modules for both protocols, which will perform stress tests. The first part of thesis describes the types of stress tests, JMeter program for performance testing and video on demand services. Next chapter describes selected protokols, especially HLS and RTSP, which are used in this thesis. The practical part contains the design and implementation of test modules including test plans. Finally, the results are processed and commented.
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High-Level Synthesis of Digital Circuits
Jendrušák, Ján ; Fujcik, Lukáš (referee) ; Dvořák, Vojtěch (advisor)
This thesis deals with practical test of high-level synthesis as a digital circuits design method and its current progress in creating RTL models. At first main tasks of HLS will be described together with C++ library of classes called SystemC, which implements hardware constructs, notion of time and hardware datatypes with arbitrary bit width. After that thesis focuses on discrete Fourier transform and its fast form of computation – fast Fourier transform. In the practical part of thesis reference FFT model is written in C++ language, which is later edited appropriately a synthesized with Stratus High-Level Synthesis tool into several hardware architectures.
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Tool for Immediate Subtitles in Running Lecture
Pokorný, Filip ; Bartík, Vladimír (referee) ; Kolář, Dušan (advisor)
This thesis deals with solving problems of Alfons consulting center, specifically of their simultaneous transcript service for the hearing-impaired students. Thanks to my regular attendance in the consulting center, I analyzed the problem and designed an app solution that I then programmed. The goal of this app is to receive a text from people realizing the simultaneous transcript and give it to students in the most suitable form which they can use along with the speaker's video projection. The conclusion of the thesis shows the evaluation of my analysis after trying the app in lessons with deaf students.
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Acceleration of NAT and Packet Filter in FPGA for 10G Networks
Orsák, Michal ; Kořenek, Jan (referee) ; Viktorin, Jan (advisor)
This thesis deals with the design of a universal hardware acceleration unit for packet filtering in FPGA for 10G networks. Maximum count of rules is greatly increased by the use of external QDR-II memory. Parameters of accelerator are suitable for NAT, packet filtering and lawful interceptions. The platform uses variable number of processing units. One of them controls accelerator by USB port. The rest is used for network processing.
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HDR Tone-Mapping Acceleration on Xilinx Zynq Platform
Nosko, Svetozár ; Zemčík, Pavel (referee) ; Musil, Martin (advisor)
This diploma thesis focuses on the High-level synthesis (HLS). The first part deals with theoretical details and methods that are used in HLS tools. This is followed by a description of the synthesis tool Vivado HLS which will be used for implementation of an application. In the second part is briefly introduced high dynamic range images (HDR) and tone mapping. The third part is dedicated to design and implementation of the aplication which implements tone mapping methods in HDR images. This methods are implemented in Vivado HLS and language C++. This application is based on platform Xilinx Zynq and it uses multiexposure camera for capturing HDR images. Images are transmitted to FPGA for tone mapping processing.
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Implementation of Statistical Functions Using HLS
Šinaľ, Peter ; Martínek, Tomáš (referee) ; Dvořák, Milan (advisor)
The aim of this thesis was to design and implement selected statistical functions used in technical analysis. I focused on moving averages, Black-Schles model for calculating option prices and Indicator Delta. These functions are through HLS transformed into an appropriate description for programmable FPGA. During the transformation process, emphasis is on low latency and resource consumption. Created solutions demonstrate the potential of HLS. They show complexity of the technical analysis and hardware requirements. Achieved results show high accuracy in the simulations. Deviation from the reference value is approximately 6,615*10e-3. The results also indicate thet that reducing latency does not necessarily cause an increase in the consumption of resources on the chip.
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Techniques Used for Image Smoothing, Blurring and Sharpening
Kubínek, Jiří ; Šilhavá, Jana (referee) ; Venera, Jiří (advisor)
This work is dedicated to methods used for digital image editing. It defines fundamental terms for this work as color space or noise. Above all, it analyses methods allowing image sharpening and blurring. It describes some of the most known algorithms from the theoretical point of view, but also introduces their implementation in C programming language. There are compared according to time complexity. The purpose of this work is to introduce digital image filtering and demonstrate elementary procedures used for their implementation.
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