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Optimizing components for Dilithium and Kyber unified hardware implementation
Dobiáš, Patrik ; Malina, Lukáš
As the ongoing standardization process of postquantum schemes yields initial outcomes, it is important not only to focus on optimization of standalone implementations but also to explore the possibilities of combining multiple schemes into one unified architecture. In this paper, we focus on exploring the combination of two NIST selected schemes, namely the CRYSTALS-Dilithium digital signature scheme and the CRYSTALS-Kyber key encapsulation scheme. We present optimized designs of unified hardware components that can be used as building blocks for these schemes. All implemented components outperform state-of-the-art implementations in both hardware utilization and performance.
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Application for managing FPGA cards
Ostrý, Pavel ; Ilgner, Petr (referee) ; Dobiáš, Patrik (advisor)
This bachelor's thesis focuses on the management of FPGA (Field Programmable Gate Array) cards within the context of the VUT FEKT school system. FPGA cards are devices that enable hardware programming using programmable logic circuits, which significantly enhances the efficiency of specific tasks that requires low latency and high data throughput. Despite the growing popularity of FPGA cards, there is no graphical applications, that would enable their management in school system enviroment. The aim of this thesis is to develop an application that enables configuration, monitoring, and control of FPGA cards through a graphical user interface. The thesis is divided into ten chapters, with the first five covering the theoretical part and the remaining five focusing on practical implementation. The theoretical part includes an introduction to FPGA cards, their comparison with other similar devices, a description of their programming, and an analysis of the requirements for the final application, followed by the selection of suitable tools. The practical part concentrates on the implementation of the user interface, code structure, and the description of individual program classes and functions. The result of the work is a graphical application that meets all specified requirements and enables configuration, monitoring, and control of FPGA cards within the VUT FEKT environment. The application was developed in the Java programming language, with the graphical interface implemented using JavaFX. Communication with the FPGA card is handled using the libnfb library, which is written in C, with its functions mapped through JNA. This bachelor's thesis delivers an FPGA card management application developed based on the needs of VUT FEKT.
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Secure Autonomous Transportation with Remote Control
Prachař, Daniel ; Dobiáš, Patrik (referee) ; Malina, Lukáš (advisor)
This bachelor thesis study the emerging trend of Autonomous Vehicle, which has become one of the most discussed topics in the modern field of transportation and technology. Autonomous Vehicle has great benefits using this technology such as avoiding road hazards and traffic conditions however, with these advances, new challenges come and risks especially in the area of cyber security. The theoretical part of this thesis focuses on introducing autonomous vehicles with their operations. Also, the identification of the communication and analysis of the security problems associated with the vehicles. One of the main security risks is the vulnerabilities of these vehicles to cyber attacks, which can threaten the safety of passengers as well as other road users. The main objective of this work is to propose a suitable solution for securing remote driving and to perform a performance evaluation. The features of such solution shall guarantee low communication delay and overall security. Practical part of the thesis presents two protocols that implement this solution in the application. These protocols are then tested and performance evaluation is performed by measuring the delay between several aspects of the communication. The result of the work is an evaluation of the proposed protocols with their recommendation for practical use.
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Cryptographic schemes implementation on small FPGA platforms
Pukšová, Ráchel ; Cíbik, Peter (referee) ; Dobiáš, Patrik (advisor)
The objective of the bachelor thesis is to implement the AES-GCM encryption algorithm on a Nexys A7-100T FPGA board. It introduces the issues of cryptography and authentication in data transmission as well as describes the FPGA technology. The implementation has been done in VHDL, as a hardware description language. It analyses the project provided by the Institute of Telecommunications of Brno University of Technology, which is intended to be modified to achieve the stated goal. In the practical part, it discusses the modifications made and the tests that verified the functionality of the implementation. It compares resource utilization with the original project as a tool to better understand the impact of the modifications made. This work is also compared with existing AES-GCM solutions. Finally, suggestions are given for further modifications that could be made to achieve lower goals.
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Tool for generalizing automated SOAR scenarios for cybersecurity knowledge sharing
Ištoňová, Miriam ; Dobiáš, Patrik (referee) ; Safonov, Yehor (advisor)
Today’s era could be defined as quantity, speed and possibilities. Security monitoring centers have responded to the challenge of an unrelenting amount of information with monitoring and categorization tools such as SIEM. However, in case of incidents themselves, the speed and automation of response is offered by an advanced SOAR solution. Like any technology, SOAR offered by different companies also contributes to the variety of individual response scenario structures and formats, bringing the clear challenge of simplification, collaboration and generalization. Therefore, the bachelor thesis focuses on the implementation of a conversion tool, with the goal of unifying and generalizing the format of automated SOAR scenarios using the evolving CACAO playbook standard. The main benefit of the tool is the ability to unify the use of SOAR scenarios, ensure successful conversion and thus facilitate knowledge sharing in the field of cybersecurity. The theoretical part of this thesis focuses on the current issue of security monitoring, explains the importance of automation within incident response and offers a detailed analysis and comparison of available technologies and formats of automated incident response playbooks. The practical part is closely related and depends on the results of the analysis. It focuses on the selection and design of a suitable format for the description of the individual automatic response scenarios as well as the following final implementation of the conversion tool itself.
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Cryptographic algorithms for low-power IoT devices
Oszelda, Matěj ; Dobiáš, Patrik (referee) ; Dzurenda, Petr (advisor)
The bachelor thesis analyses the possibilities of application of operating systems, cryptographic libraries and their primitives in memory, performance and computationally constrained IoT environment. It then implements selected tools for securing communication in a system with constrained IoT devices. The theoretical part discusses the IoT, the different operating systems and cryptographic libraries in this environment. It then presents the measurement and comparison of cryptographic libraries and their primitives. Based on the measurements, it selects tools for implementation in securing the communication of IoT devices. It then creates a design and implements the system.
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Design and implementation of countermeasures against side-channel attacks on an FPGA platform
Kuřina, Petr ; Jedlička, Petr (referee) ; Dobiáš, Patrik (advisor)
Currently, significant progress is being made in the field of digital systems and cryptography, requiring adequate security against various forms of attacks. Special attention is paid to development on the FPGA (Field-Programmable Gate Array) platform, which provides flexibility and performance for implementing diverse applications, including cryptographic algorithms. This semester thesis focuses on the systematic analysis of possible leaks of sensitive information from the implementation of a cryptographic scheme on the FPGA platform. The FPGA platform is presented in the work, including HDL (Hardware Description Language) programming languages such as Verilog or VHDL. It then presents a general overview of side channels and their types, countermeasures, and a~detailed description of security techniques. The next chapter is the AES cryptographic scheme and a description of its operations. There is a chapter devoted to a comparison of current articles on the issue. The following is a description of a professional workplace, such as an oscilloscope or a Sakura-X (Sasebo-GIII) hardware board. In the final part, the measurement results are presented without any measures, only the AES algorithm is implemented, and then in the next part there is a countermeasure proposal, which is implemented and measured. The results are described and subsequently displayed in graphic form.
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Application for collecting security event logs from computer infrastructure
Žernovič, Michal ; Dobiáš, Patrik (referee) ; Safonov, Yehor (advisor)
Computer infrastructure runs the world today, so it is necessary to ensure its security, and to prevent or detect cyber attacks. One of the key security activities is the collection and analysis of logs generated across the network. The goal of this bachelor thesis was to create an interface that can connect a neural network to itself to apply deep learning techniques. Embedding artificial intelligence into the logging process brings many benefits, such as log correlation, anonymization of logs to protect sensitive data, or log filtering for optimization a SIEM solution license. The main contribution is the creation of a platform that allows the neural network to enrich the logging process and thus increase the overall security of the network. The interface acts as an intermediary step to allow the neural network to receive logs. In the theoretical part, the thesis describes log files, their most common formats, standards and protocols, and the processing of log files. It also focuses on the working principles of SIEM platforms and an overview of current solutions. It further describes neural networks, especially those designed for natural language processing. In the practical part, the thesis explores possible solution paths and describes their advantages and disadvantages. It also analyzes popular log collectors (Fluentd, Logstash, NXLog) from aspects such as system load, configuration method, supported operating systems, or supported input log formats. Based on the analysis of the solutions and log collectors, an approach to application development was chosen. The interface was created based on the concept of a REST API that works in multiple modes. After receiving the records from the log collector, the application allows saving and sorting the records by origin and offers the user the possibility to specify the number of records that will be saved to the file. The collected logs can be used to train the neural network. In another mode, the interface forwards the logs directly to the AI model. The ingestion and prediction of the neural network are done using threads. The interface has been connected to five sources in an experimental network.
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Asymmetric Cryptography on FPGA
Dobiáš, Patrik ; Smékal, David (referee) ; Malina, Lukáš (advisor)
This bachelor thesis deals with the analysis of existing hardware implementations of asymmetric cryptographic schemes on the FPGA platform and the then implementation of the cryptographic scheme Ed25519 on this platform. The resulting implementation is described in detail and compared with existing implementations. At the end of this work, the deployment of this implementation on the Virtex UltraScale+ FPGA is described.
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Postquantum Cryptography on the FPGA Platform
Dobiáš, Patrik ; Jedlička, Petr (referee) ; Malina, Lukáš (advisor)
This master thesis deals with the hardware implementations of post-quantum cryptogra- phy schemes on FPGA platforms. After the initial comparison of the candidate schemes for NIST standardization and the analysis of the previous work focusing on these schemes, Crystals-KYBER scheme was chosen and implemented. All scheme algorithms have been implemented inside a single component, minimizing resource utilization. The results of this implementation were analyzed and compared with the existing implementations. At the end of this work, the implemented scheme was deployed on Virtext UltraScale+ and tested for the use during mutually authenticated key exchange (AKE).
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