Original title: Vytvoření modelu procesoru 8051
Translated title: Modelling of 8051 Processor
Authors: Krůpa, Tomáš ; Kajan, Michal (referee) ; Masařík, Karel (advisor)
Document type: Bachelor's theses
Year: 2014
Language: cze
Publisher: Vysoké učení technické v Brně. Fakulta informačních technologií
Abstract: [cze] [eng]

Keywords: 8051; ADL; architecture description languages; CodAL; Codasip; hazard; MCS51; microcontroller; modeling; pipeline; processor; processor architecture; processor classification; simulation; 8051; ADL; architektura procesorů; CodAL; Codasip; hazard; jazyk pro popis architektur; klasifikace procesorů; MCS51; mikrokontrolér; modelování; procesor; simulace; zřetězené zpracování

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/56513

Permalink: http://www.nusl.cz/ntk/nusl-584344


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Bachelor's theses
 Record created 2024-04-02, last modified 2024-04-03


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