Original title: Framework pro hardwarovou akceleraci 400Gb sítí
Translated title: Framework for Hardware Acceleration of 400Gb Networks
Authors: Hummel, Václav ; Matoušek, Jiří (referee) ; Kořenek, Jan (advisor)
Document type: Master’s theses
Year: 2017
Language: cze
Publisher: Vysoké učení technické v Brně. Fakulta informačních technologií
Abstract: [cze] [eng]

Keywords: 400 Gigabit Ethernet; Direct Memory Access (DMA); DPDK; FPGA; hardware acceleration; Network Functions Virtualization (NFV); PCI Express; SZE; 400 Gigabitový ethernet; DPDK; FPGA; hardwarová akcelerace; PCI Express; Přímý přístup do paměti (DMA); SZE; Virtualizované síťové funkce (NFV)

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/69556

Permalink: http://www.nusl.cz/ntk/nusl-363862


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Master’s theses
 Record created 2017-08-31, last modified 2022-09-04


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