|
|
Neural network inference on the ZYNQ
Masár, Filip ; Bidlo, Michal (referee) ; Mrázek, Vojtěch (advisor)
Neural networks are becoming increasingly popular. Inference is now performed not only on high-end GPUs, but also on low-power embedded systems. This bachelor’s thesis explores ways to test fault tolerance on the hardware accelerator of neural networks. It propose the use of FPGAs to increase the performance of fault tolerance experiments. To achieve this goal, an open-source accelerator NVDLA was used and modified to support fault injection. Furthermore, an analysis of the fault tolerance of ResNet-18 is presented to demonstrate the proposed solution.
|
|
|
Usage of Modern Methods for Increasing Reliability of Control System Implementations
Szurman, Karel ; Mičulka, Lukáš (referee) ; Kaštil, Jan (advisor)
At avionics control and critical systems is necessary guarantee a minimal level of fault tolerance and their high reliability. On the electronic components in these devices has an undesirable influence environment conditions and mainly cosmic ray. In this paper are described the most common failure types of semiconductor components and devices together with modern methods which can be increased the system fault tolerance and its overall reliability. There are introduced aspects of the avionic systems design due to finally certification and ways to evaluate its safety. This thesis describes design and implementation of the CAN bus control system for the FPGA platform which uses the CANAerospace application protocol. Created system design is improved by the TMR architecture. Fault tolerance of both system version is tested by the SEU framework which allows using the dynamic partial reconfiguration generate an SEU failures into running FPGA design.
|
|
|
Dependability Assessment of Fault Tolerant Systems
Suchánek, Martin ; Šimek, Václav (referee) ; Strnadel, Josef (advisor)
Reliability is an important part of various systems. The aim of the work is to create reliability models of some reconfigurable and nonreconfigurable fault tolerant systems and subsequent evaluation of their reliability indicators. The Uppaal tool is used to create models, along with the SMC extension, which is used for verification. The result of the work is the verification of models and evaluation of reliability indicators using the tool Uppaal SMC.
|
|
|
VHDL Design of Robot Controller for Autonomous Robot Movement in Maze
Podivínský, Jakub ; Strnadel, Josef (referee) ; Zachariášová, Marcela (advisor)
This master thesis describes design and implementation of a robot controller for autonomous movement in a maze. Robot represents an exemplary system, which is designed for testing and validation of fault-tolerance methodologies. A part of this work contains introduction to reliability of digital systems, especially those which are based on Field Programmable Gate Array (FPGA). Moreover, this introduces techniques that ensure robustness against faults in digital systems; attention is devoted to the usage of FPGA technology in this area and a technique called partial dynamic reconfiguration.
|
|
|
Optimization of Distributed Network Flow Collector
Wrona, Jan ; Grégr, Matěj (referee) ; Žádník, Martin (advisor)
This thesis is focused on the optimization of distributed IP flow information collector. Nowadays, the centralized collector is a frequently used solution but is already reaching its performance limits in large scale and high-speed networks. The implementation of the distributed collector is in its early phase and it is necessary to look for solutions that will use it to its full potential. Therefore this thesis proposes a shared nothing architecture without a single point of failure. Using the above proposed architecture, the distributed collector is tolerant to the failure of at least one node. A distributed flow data analysis software, whose performance scales linearly with the number of nodes, is also part of this thesis.
|
|
|
Functional Verification of Robotic System Using UVM
Krajčír, Stanislav ; Čekan, Ondřej (referee) ; Zachariášová, Marcela (advisor)
One of the currently most used approaches for verification of hardware systems is functional verification. This master thesis describes design and implementation of a verification environment using UVM (Universal Verification Methodology) methodology for verifying the correctness of the robot controller in order to eliminate functional errors and faults of its implementation. The theoretical part of the thesis describes the basic information about functional verification, methodologies for creating verification environments, the SystemVerilog language and fault tolerance methodologies. The next part of thesis focuses on the design of the verification environment, its implementation and the creation of tests used to verify the correctness of the robot controller. Results of verification are discussed and evaluated in the conclusion of this work.
|
|
|
Fault tolerant Field Programmable Neural Networks
Krčma, Martin ; Kordík, Pavel (referee) ; Stopjaková, Viera (referee) ; Drábek, Vladimír (advisor)
Tato práce se zaměřuje na koncept Field Programmable Neural Networks jehož cílem je učinit implementaci umělých neuronových sítí v hradlových polích méně náročnou jejich prostředky. Za tímto účelem práce koncept rozvíjí a představuje několik jeho různých typů jež se vyznačují různými poměry mezi spotřebou zdrojů hradlových polí a přesností s jakou aproximují původní neuronovou síť jíž implementují. Teze díle rozšiřuje koncept o metody zabezpečení proti poruchám s využitím redundance a také bez ní.
|
|
|
Fault tolerant Field Programmable Neural Networks
Krčma, Martin ; Kordík, Pavel (referee) ; Stopjaková, Viera (referee) ; Drábek, Vladimír (advisor)
Tato práce se zaměřuje na koncept Field Programmable Neural Networks jehož cílem je učinit implementaci umělých neuronových sítí v hradlových polích méně náročnou jejich prostředky. Za tímto účelem práce koncept rozvíjí a představuje několik jeho různých typů jež se vyznačují různými poměry mezi spotřebou zdrojů hradlových polí a přesností s jakou aproximují původní neuronovou síť jíž implementují. Teze díle rozšiřuje koncept o metody zabezpečení proti poruchám s využitím redundance a také bez ní.
|
|
|
Dependability Assessment of Fault Tolerant Systems
Suchánek, Martin ; Šimek, Václav (referee) ; Strnadel, Josef (advisor)
Reliability is an important part of various systems. The aim of the work is to create reliability models of some reconfigurable and nonreconfigurable fault tolerant systems and subsequent evaluation of their reliability indicators. The Uppaal tool is used to create models, along with the SMC extension, which is used for verification. The result of the work is the verification of models and evaluation of reliability indicators using the tool Uppaal SMC.
|
|
|
Optimization of Distributed Network Flow Collector
Wrona, Jan ; Grégr, Matěj (referee) ; Žádník, Martin (advisor)
This thesis is focused on the optimization of distributed IP flow information collector. Nowadays, the centralized collector is a frequently used solution but is already reaching its performance limits in large scale and high-speed networks. The implementation of the distributed collector is in its early phase and it is necessary to look for solutions that will use it to its full potential. Therefore this thesis proposes a shared nothing architecture without a single point of failure. Using the above proposed architecture, the distributed collector is tolerant to the failure of at least one node. A distributed flow data analysis software, whose performance scales linearly with the number of nodes, is also part of this thesis.
|
guest ::
