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C Compiler for AVR32 Microprocesor
Nagy, Michal ; Husár, Adam (referee) ; Hruška, Tomáš (advisor)
This bachelor's thesis deals with creation of an AVR32 backend for the LLVM compiler framework. The core of this work consists of explaining the way of architecture description in LLVM and of my own implementation of the AVR32 backend. Furthermore, several problems encountered during the implementation are discussed along with their possible solutions. As the result of this work functional backend, with a few constraints discussed in the conclusion chapter, was created.
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Interactive Disassembler
Mrva, Milan ; Přikryl, Zdeněk (referee) ; Křoustek, Jakub (advisor)
This thesis describes procedures and tools of reverse engineering in terms of software development. There are introduces different techniques of protection against decomposition of executables. The work also mentions some programs used for decomposition analysis. Furthermore it contains information about architecture of processing units, with emphasis on microprocessors Intel and Motorola. Variety of executable formats is shown. Generic retargetable disassembler was implemented. There is a description of its structure and plugins. These plugins represents three algorithms used for disassembling a program. One of them applies a multi-process parsing engine, which is an own design by author of the thesis. At the end, these techniques are compared and further development is outlined.
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Edems - Computer Simulator For Learning
Friml, Dominik
This article introduces new educational and demonstrative tool for microprocessor technology called EDEMS, which is designed to ease teaching of microprocessors at universities, high schools and at homes of enthusiasts. It describes reasons of its creation, problems that it solved, and main advantages of this solution.
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C Compiler for AVR32 Microprocesor
Nagy, Michal ; Husár, Adam (referee) ; Hruška, Tomáš (advisor)
This bachelor's thesis deals with creation of an AVR32 backend for the LLVM compiler framework. The core of this work consists of explaining the way of architecture description in LLVM and of my own implementation of the AVR32 backend. Furthermore, several problems encountered during the implementation are discussed along with their possible solutions. As the result of this work functional backend, with a few constraints discussed in the conclusion chapter, was created.
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Interactive Disassembler
Mrva, Milan ; Přikryl, Zdeněk (referee) ; Křoustek, Jakub (advisor)
This thesis describes procedures and tools of reverse engineering in terms of software development. There are introduces different techniques of protection against decomposition of executables. The work also mentions some programs used for decomposition analysis. Furthermore it contains information about architecture of processing units, with emphasis on microprocessors Intel and Motorola. Variety of executable formats is shown. Generic retargetable disassembler was implemented. There is a description of its structure and plugins. These plugins represents three algorithms used for disassembling a program. One of them applies a multi-process parsing engine, which is an own design by author of the thesis. At the end, these techniques are compared and further development is outlined.
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Virtual Platforms for Instruction Set Simulation
Ministr, Martin ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
This master's thesis deals with creation of generators of the code for existing virtual platforms QEMU and OVP. This work consist of study of techniques, which are used by virtual machines for their work. Main part of this work is the design of process, which transforms input instruction sets to the code used by these virtual platforms. As the result of this work functional programs, which generate the code for these virtual platforms, was created.
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