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Building Management System
Kunický, Daniel ; Sedláček, Pavel (referee) ; Baumgartnerová, Alena (advisor)
Tato práce umožňuje náhled do systému měření a regulace a jeho projektování. Systém měření a regulace je součástí mnoha moderních budov od rodinných domů až po výzkumné střediska. Tento systém je také schopen zajistit významné úspory na energiích a má také na starosti komfort a bezpečí obyvatel.
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Reconfigurable 5G NR signal generator on RFSoC FPGA
Indrák, Dominik ; Gazda, Juraj (referee) ; Maršálek, Roman (advisor)
This work deal with simulation of basic structure of OFDM modulator and demodulator of the upcoming standard 5G NR. In MATLAB are simulated basic parts including modulation, reference signal inserting, Fourier transform, cyclic prefix inserting, AWGN and multi-path propagation. In this work is proposed implementation of the modulator and demodulator into RFSoC board and his configuration. Designed generator is implemented with the use of STEMLab RedPitaya platform. In Matlab software is generated 5G OFDM signal used to transmitt. Received signal is evaluated in Matlab software.
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Signal analyzer with FPGA
Kraus, Václav ; Bohrn, Marek (referee) ; Šteffan, Pavel (advisor)
The aim of this thesis is to study the possibilities of spectrum calculations, as well as data transfer via USB 3.0 and data saving to a DDR3 memory via FPGA. The focus is also on design and realization of a spectral analyzer with a record of samples to DDR memory expnaded by a narrowband converter using gate arrays. The work is divided into two sections, the first one dealing with the theoretical background. The second part denotes the realization of the design. The result of this work is a signal analyzer in a FPGA controlled from a computer application via the USB 3.0 interface.
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Diagnostics of LCD Monitors in the Production Line Environment
Stach, Tomáš ; Kaštil, Jan (referee) ; Šimek, Václav (advisor)
Operating system has to recognize specifications of connected LCD monitor for detecting it's possibilities. These specifications are stored in special structure EDID inserted inside while production through DDC channel. This thesis describes interfaces used for connection LCD monitor to graphical adapter, structure EDID, channel DDC. Result of this thesis is program used on production line for writing and checking EDID structure into LCD monitors.
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Evolution by gene duplication with regard to subfunctionalization.
Romášek, Marek ; Krylov, Vladimír (advisor) ; Reifová, Radka (referee)
Evolution by gene duplication has been a prominent topic of biology for various decades. Novel methods and approaches recently brought about a considerable progress in our understanding of this phenomenon. The aim of this thesis is to review the modern conceptions of preservation of duplicate genes in genomes of organisms and the processes involved. Another goal is to assess the significance of the concept of subfunctionalization, resolving of ancestral functions among the duplicates, leading to their preservation.
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Reconfigurable 5G NR signal generator on RFSoC FPGA
Indrák, Dominik ; Gazda, Juraj (referee) ; Maršálek, Roman (advisor)
This work deal with simulation of basic structure of OFDM modulator and demodulator of the upcoming standard 5G NR. In MATLAB are simulated basic parts including modulation, reference signal inserting, Fourier transform, cyclic prefix inserting, AWGN and multi-path propagation. In this work is proposed implementation of the modulator and demodulator into RFSoC board and his configuration. Designed generator is implemented with the use of STEMLab RedPitaya platform. In Matlab software is generated 5G OFDM signal used to transmitt. Received signal is evaluated in Matlab software.
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Diagnostics of LCD Monitors in the Production Line Environment
Stach, Tomáš ; Kaštil, Jan (referee) ; Šimek, Václav (advisor)
Operating system has to recognize specifications of connected LCD monitor for detecting it's possibilities. These specifications are stored in special structure EDID inserted inside while production through DDC channel. This thesis describes interfaces used for connection LCD monitor to graphical adapter, structure EDID, channel DDC. Result of this thesis is program used on production line for writing and checking EDID structure into LCD monitors.
|
|
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Signal analyzer with FPGA
Kraus, Václav ; Bohrn, Marek (referee) ; Šteffan, Pavel (advisor)
The aim of this thesis is to study the possibilities of spectrum calculations, as well as data transfer via USB 3.0 and data saving to a DDR3 memory via FPGA. The focus is also on design and realization of a spectral analyzer with a record of samples to DDR memory expnaded by a narrowband converter using gate arrays. The work is divided into two sections, the first one dealing with the theoretical background. The second part denotes the realization of the design. The result of this work is a signal analyzer in a FPGA controlled from a computer application via the USB 3.0 interface.
|
|
|
Evolution by gene duplication with regard to subfunctionalization.
Romášek, Marek ; Reifová, Radka (referee) ; Krylov, Vladimír (advisor)
Evolution by gene duplication has been a prominent topic of biology for various decades. Novel methods and approaches recently brought about a considerable progress in our understanding of this phenomenon. The aim of this thesis is to review the modern conceptions of preservation of duplicate genes in genomes of organisms and the processes involved. Another goal is to assess the significance of the concept of subfunctionalization, resolving of ancestral functions among the duplicates, leading to their preservation.
|
|
|
Building Management System
Kunický, Daniel ; Sedláček, Pavel (referee) ; Baumgartnerová, Alena (advisor)
Tato práce umožňuje náhled do systému měření a regulace a jeho projektování. Systém měření a regulace je součástí mnoha moderních budov od rodinných domů až po výzkumné střediska. Tento systém je také schopen zajistit významné úspory na energiích a má také na starosti komfort a bezpečí obyvatel.
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