|
|
Acceleration of Transistor-Level Evolutionary Design of Digital Circuits Using Zynq
Mrázek, Vojtěch ; Sekanina, Lukáš (referee) ; Vašíček, Zdeněk (advisor)
The goal of this project is to design a hardware unit that is designed to accelerate evolutionary design of digital circuits on transistor level. The project is divided to two parts. The first one describes design methods of the MOSFET circuits and issues of evolutionary algorithms. It also analyses current results in this domain and provides a new method for the design and optimization. The second part describes proposed unit that accelerates the new method on the circuit Zynq which integrates ARM processor and programmable logic. The new method functionality has been empirically analysed in the task of optimization of few circuits with more inputs. The hardware unit has been tested for designing of gates on transistor level.
|
|
|
Coevolutionary Algorithm for Test-Based Problems
Hulva, Jiří ; Sekanina, Lukáš (referee) ; Drahošová, Michaela (advisor)
This thesis deals with the usage of coevolution in the task of symbolic regression. Symbolic regression is used for obtaining mathematical formula which approximates the measured data. It can be executed by genetic programming - a method from the category of evolutionary algorithms that is inspired by natural evolutionary processes. Coevolution works with multiple evolutionary processes that are running simultaneously and influencing each other. This work deals with the design and implementation of the application which performs symbolic regression using coevolution on test-based problems. The test set was generated by a new method, which allows to adjust its size dynamically. Functionality of the application was verified on a set of five test tasks. The results were compared with a coevolution algorithm with a fixed-sized test set. In three cases the new method needed lesser number of generations to find a solution of a desired quality, however, in most cases more data-point evaluations were required.
|
|
|
Polymorphic Self-Checking Circuits
Mazuch, Martin ; Růžička, Richard (referee) ; Sekanina, Lukáš (advisor)
This Master's thesis deals with question of the development of self-checking polymorphic circuits. It deals with a traditional way of creating reliable and self-checking circuits, presenting basic principles and methods. Also a method of Cartesian Genetic Programming for development of combinational circuits is explained. This thesis describes concepts of polymorphic gates and circuits and their benefits in practical use. Some existing self-checking polymorphic circuits are presented and their self-checking capabilities are analyzed. A proposal of realization of a design system for self-checking polymorphic circuits is given. A design system has been built based on presented specification and an application allowing simulations and analysis of system-proposed solutions has been created. Variety of experiments have been performed at created system and several interesting solutions have been acquired. At the end, conclusion is given and benefits of MSc. project are discussed.
|
|
|
Genetic Programming for Design of Digital Circuits
Hejtmánek, Michal ; Bidlo, Michal (referee) ; Gajda, Zbyšek (advisor)
The goal of this work was the study of evolutionary algorithms and utilization of them for digital circuit design. Especially, a genetic programming and its different manipulation with building blocks is mentioned in contrast to a genetic algorithm. On the basis of this approach, I created and tested a hybrid method of electronic circuit design. This method uses spread schemes according to the genetic algorithm for the pattern problems witch are solved by the genetic programming. The method is more successful and have faster convergence to a solution in difficult electronic circuits design than a common algorithm of the genetic programming.
|
|
|
Crossover in Cartesian Genetic Programming
Vácha, Petr ; Vašíček, Zdeněk (referee) ; Sekanina, Lukáš (advisor)
Optimization of digital circuits still attracts much attention not only of researchers but mainly chip producers. One of new the methods for the optimization of digital circuits is cartesian genetic programming. This Master's thesis describes a new crossover operator and its implementation for cartesian genetic programming. Experimental evaluation was performed in the task of three-bit multiplier and five-bit parity circuit design.
|
|
|
A Tool for Analysis of Digital Circuit Evolution Records
Kapusta, Vlastimil ; Bidlo, Michal (referee) ; Sekanina, Lukáš (advisor)
This master thesis describes stochastic optimization algorithms inspired in nature that use population of individuals - evolutionary algorithms. Genetic programming and its variant - cartesian genetic programming is described in a greater detail. This thesis is further focused on the analysis and visualization of digital circuit evolution records. Existing tools for visualization of the circuit evolution were analysed, but because no suitable tool allowing complex analysis of the circuit evolution was found, a new set of functions was proposed and the principles of a new tool were formulated. These functions were implemented in form of an interactive GUI application in Java programming language. The application was described in detail and then used for analysis of digital circuit evolution records.
|
|
|
Evolutionary Design for Circuit Approximation
Dvořáček, Petr ; Vašíček, Zdeněk (referee) ; Sekanina, Lukáš (advisor)
In recent years, there has been a strong need for the design of integrated circuits showing low power consumption. It is possible to create intentionally approximate circuits which don't fully implement the specified logic behaviour, but exhibit improvements in term of area, delay and power consumption. These circuits can be used in many error resilient applications, especially in signal and image processing, computer graphics, computer vision and machine learning. This work describes an evolutionary approach to approximate design of arithmetic circuits and other more complex systems. This text presents a parallel calculation of a fitness function. The proposed method accelerated evaluation of 8-bit approximate multiplier 170 times in comparison with the common version. Evolved approximate circuits were used in different types of edge detectors.
|
|
|
Coevolution of Image Filters and Fitness Predictors
Trefilík, Jakub ; Hrbáček, Radek (referee) ; Drahošová, Michaela (advisor)
This thesis deals with employing coevolutionary principles to the image filter design. Evolutionary algorithms are very advisable method for image filter design. Using coevolution, we can add the processes, which can accelerate the convergence by interactions of candidate filters population with population of fitness predictors. Fitness predictor is a small subset of the training set and it is used to approximate the fitness of the candidate solutions. In this thesis, indirect encoding is used for predictors evolution. This encoding represents a mathematical expression, which selects training vectors for candidate filters fitness prediction. This approach was experimentally evaluated in the task of image filters for various intensity of random impulse and salt and pepper noise design and the design of the edge detectors. It was shown, that this approach leads to adapting the number of target objective vectors for a particular task, which leads to computational complexity reduction.
|
|
|
Colearning in Coevolutionary Algorithms
Wiglasz, Michal ; Dobai, Roland (referee) ; Drahošová, Michaela (advisor)
Cartesian genetic programming (CGP) is a form of genetic programming where candidate programs are represented in the form of directed acyclic graphs. It was shown that CGP can be accelerated using coevolution with a population of fitness predictors which are used to estimate the quality of candidate solutions. The major disadvantage of the coevolutionary approach is the necessity of performing many time-consuming experiments to determine the best size of the fitness predictor for the particular task. This project introduces a new fitness predictor representation with phenotype plasticity, based on the principles of colearning in evolutionary algorithms. Phenotype plasticity allows to derive various phenotypes from the same genotype. This allows to adapt the size of the predictors to the current state of the evolution and difficulty of the solved problem. The proposed algorithm was implemented in the C language and optimized using SSE2 and AVX2 vector instructions. The experimental results show that the resulting image filters are comparable with standard CGP in terms of filtering quality. The average speedup is 8.6 compared to standard CGP. The speed is comparable to standard coevolutionary CGP but it is not necessary to experimentally determine the best size of the fitness predictor while applying coevolution to a new, unknown task.
|
|
|
Towards the Automatic Design of Image Filters Based on Cartesian Genetic Programming
Kečkéš, Miroslav ; Uher, Václav (referee) ; Karásek, Jan (advisor)
The aim of this diploma thesis is using cartesian genetic programming on design image filters and creating basic structure for implement diferent type of problems. Genetic programming is rapidly growing method, which often using for solve dificult problems. This thesis analyze basic principle, way of application and implementing this method to design filters. Result of this thesis is program realize design filters define by specific parameters, overview of implementig method and achieve summary from this sphere.
|
guest ::
