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Approximate String Matching Algorithm Implementation in FPGA
Pařenica, Martin ; Martínek, Tomáš (referee) ; Fučík, Otto (advisor)
This paper describes sequence alignment algorithms of nucleotide sequences. There are described pairwise alignment algorithms using database search or dynamic programming. Then in the paper is description of dynamic programming for multiple sequences and algorithm that builds phylogenetic trees. At the end of the first part of the paper is the description of technology FPGA. In the second part that is more practical is described implemntation of the choosen one algorithm. This part includes also examples of some multiple alignments.
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Usage of Modern Methods for Increasing Reliability of Control System Implementations
Szurman, Karel ; Mičulka, Lukáš (referee) ; Kaštil, Jan (advisor)
At avionics control and critical systems is necessary guarantee a minimal level of fault tolerance and their high reliability. On the electronic components in these devices has an undesirable influence environment conditions and mainly cosmic ray. In this paper are described the most common failure types of semiconductor components and devices together with modern methods which can be increased the system fault tolerance and its overall reliability. There are introduced aspects of the avionic systems design due to finally certification and ways to evaluate its safety. This thesis describes design and implementation of the CAN bus control system for the FPGA platform which uses the CANAerospace application protocol. Created system design is improved by the TMR architecture. Fault tolerance of both system version is tested by the SEU framework which allows using the dynamic partial reconfiguration generate an SEU failures into running FPGA design.
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High Order Modulation Digital Modulator
Žižka, Josef ; Hubík,, Vladimír (referee) ; Šebesta, Jiří (advisor)
The object of this work is to meet readers with the basic principle and solution of high order digital modulator with integrated circuit AD9957 produced by the company Analog Devices. Block diagram and final scheme of the modulator and device construction is presented. Standard USB interface for communication, control and data transmission between modulator and host represented by personal computer is applied. The project describes following parts of the designed system: PCB layout, control firmware of MCU and application program running under PC. In the conclusion, chosen results of measurement are described and evaluated.
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Implementation of ethernet communication inteface into FPGA chip
Skibik, Petr ; Fujcik, Lukáš (referee) ; Bohrn, Marek (advisor)
The thesis deals with the implementation of Ethernet-based network communication interface into FPGA chip. VHDL programming language is used for description of the hardware. The interface includes the implementation of link-layer Ethernet protocol and network protocols such as IPv4, ARP, ICMP and UDP. The final design allows bi-directional communication on the transport-layer level of TCP/IP model. The designed interface was implemented into Virtex5 FPGA chip on development board ML506 by Xilinx.
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Fading channel hardware simulator
Pirochta, Pavel ; Kováč, Michal (referee) ; Maršálek, Roman (advisor)
Fading channel is a communication channel that experiences different interference and fading due to multi-path signal propagation. The fading channel is designed by the finite impulse response filter with the time-varying impulse characteristic. The realisation of this filtr is based on the TDL (Tapped Delay Line) model, which simulate signal delay and signal attenuation in each branch. The aim of this thesis is to create the VHDL design of selected fading channel simulator and its description for hardware implementation into the FPGA.
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