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Digital filtration in 8-bit microcontrollers
Záplata, Filip ; Frýza, Tomáš (referee) ; Fedra, Zbyněk (advisor)
The aim of my bachelor’s thesis is a digital filtration using the 8-bit processors. Digital filters are in use a lot and gradually outdoing analog equivalents. Their advantages are indisputable, but computing still inhibits bigger progress. Generally used microcontrollers do not have very powerfull core, so there is effort to apply as bright as possible algorithms. Program code can be written in C language or assembler eventually is possible to combine both languages. The task is to make a library of functions based on some powerfull algorithms for filtering. Testing those libraries and comparing their useability focused on maximal speed and universality of use and review ways of programming.
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Memory Testing on SGI/MIPS Architecture
Rydlo, Karol ; Jaroš, Jiří (referee) ; Kašpárek, Tomáš (advisor)
Work is engaged in making solution for creating own memory tests on graphical station SGI O2. This thesis produces work on MIPS processor architecture and it try to find the ideal environments for testing memory and with it is nearly related looking for chances of start and compile application for SGI O2. Part of my thesis is also target using cross-compilers, for effective and useful work with program for other architecture.
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x86 Assembler Simulator for Education
Heštera, Andrej ; Semerád, Lukáš (referee) ; Orság, Filip (advisor)
Point of this thesis is gain knowledge base of x86 Instruction Set Architecture and x86 assembly language through analysis. Based on this knowledge, design and implement simulation environment in object oriented programming language Java SE8. This environment will give user option to create code based on conventions and syntax of Netwide Assembler and simulate created code on virtual representation - simulation model, which will imitate behavior of processor implementing instruction set architecture x86. The result of using this environment should be new knowledge for user about basic function of machine code execution and how this execution alters state of processor, without the need to specially compile created code for use in Debugger and having physical system implementing architecture x86.
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Present-day Programming Method of Microcontroller
Medla, Eduard ; Matyáš, Pavel (referee) ; Zuth, Daniel (advisor)
This bachelor thesis is dedicated to modern methods of programming microcontrollers. In this work are examined some programming languages, various programming environments and graphic editors. In every methods of programming are explained their advantages and disadvantages. Here are two examined methods of loading program to microcontroller, so called flashing. Choosed method is programming language C, which was used to programme two-state regulator with hysteresis in environment AVR Studio 6.2.
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x86 Assembler Simulator for Education
Heštera, Andrej ; Semerád, Lukáš (referee) ; Orság, Filip (advisor)
Point of this thesis is gain knowledge base of x86 Instruction Set Architecture and x86 assembly language through analysis. Based on this knowledge, design and implement simulation environment in object oriented programming language Java SE8. This environment will give user option to create code based on conventions and syntax of Netwide Assembler and simulate created code on virtual representation - simulation model, which will imitate behavior of processor implementing instruction set architecture x86. The result of using this environment should be new knowledge for user about basic function of machine code execution and how this execution alters state of processor, without the need to specially compile created code for use in Debugger and having physical system implementing architecture x86.
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x86 Assembler Simulator for Education
Heštera, Andrej ; Semerád, Lukáš (referee) ; Orság, Filip (advisor)
Point of this thesis is gain knowledge base of x86 Instruction Set Architecture and x86 assembly language through analysis. Based on this knowledge, design and implement simulation environment in object oriented programming language Java SE8. This environment will give user option to create code based on conventions and syntax of Netwide Assembler and simulate created code on virtual representation - simulation model, which will imitate behavior of processor implementing instruction set architecture x86. The result of using this environment should be new knowledge for user about basic function of machine code execution and how this execution alters state of processor, without the need to specially compile created code for use in Debugger and having physical system implementing architecture x86.
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Visualising CPU Activity
Ďurčo, Marián ; Češka, Milan (referee) ; Vojnar, Tomáš (advisor)
This thesis is intended to be a complement for learning about the RISC pipeline. Product of this thesis is a web application. After reviewing various tools and libraries suitable for this work, we have chosen two main libraries React and Redux. The created solution allows the instruction flow to be displayed in the RISC pipeline as well as states of the registers and the memory. It makes easy to perform transitions between the various parts of the visualization. This visualization allows a basic understanding of the RISC pipeline principles and also individual assembly instructions.
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Emulator of Simple Processor
Kuzník, Petr ; Přikryl, Zdeněk (referee) ; Křoustek, Jakub (advisor)
Emulator will be designed as generic emulator. It should be capable of emulating versatile architectures. Each architecture will be stored in separate module implemented as dynamically linked dll libraries. Main goal is for the emulator to be generic and design its structure in a way, so that it would be possible to easily add new architecture modules and design these modules with already implemented abstractions. Primarily implemented architecture will be Commodore 64. It is a personal computer used mainly in USA during 1980s.
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