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Automatický systém pro sledování polohy
Brouček, Jan ; Younes, Dina (oponent) ; Šteffan, Pavel (vedoucí práce)
Bakalářská práce obsahuje návrh zařízení, které je schopné určit svoji polohu pomocí systému GPS. Zjištěné údaje o poloze jsou zaznamenávány na paměťovou kartu microSD a volitelně posílány pomocí sítě GSM na webový server, kde jsou zveřejňovány. Údaje jsou zaznamenávány ve formátu GPX, pro možnost jejich vyhodnocování v běžně dostupných programech, a zařízeních. Předpokládané využití zařízení je pro informativní sledování trasy pohyblivých objektů, nebo jako zabezpečovací zařízení automobilu, schopné na požádání téměř kdykoliv sdělit uživateli jeho polohu.
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Digital signal processing application based on residue number system
Rolko, Maroš ; Bohrn, Marek (oponent) ; Younes, Dina (vedoucí práce)
This work deals with residue number system and its applications in digital circuits. The first part is VHDL design of different adder types in residue number system and their comparison with regular adders. The second part is VHDL implementation of image processor that computes in residue number system and its performance analysis. Presented text contains description of design procedures and presentation of analysis results.
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Residue Number System Based Building Blocks for Applications in Digital Signal Processing
Younes, Dina ; Brzobohatý, Jaromír (oponent) ; Vlček, Čestmír (oponent) ; Šteffan, Pavel (vedoucí práce)
This doctoral thesis deals with designing residue number system based building blocks to enhance the performance of digital signal processing applications. The residue number system (RNS) is a non-weighted number system that provides carry-free, parallel, high speed, secure and fault tolerant arithmetic operations. These features make it very attractive to be used in high-performance and fault tolerant digital signal processing (DSP) applications. A typical RNS system consists of three main components; the first one is the binary to residue converter that computes the RNS equivalent of the inputs represented in the binary number system. The second component in this system is parallel residue arithmetic units that perform arithmetic operations on the operands already represented in RNS. The last component is the residue to binary converter, which converts the outputs back into their binary representation. The main aim of this thesis was to propose novel structures of the basic components of this system in order to be later used as fundamental units in DSP applications. This thesis encloses improving and designing novel structures of these components, simulating and verifying their efficiency via FPGA implementation. In addition to suggesting novel structures of basic RNS components, a detailed study on different moduli sets that compares and determines the most efficient one for different dynamic range requirements is also presented. One of the main outcomes of this thesis is concluding and verifying the main condition that should be met when choosing a moduli set, in order to improve the timing performance of a DSP application. An RNS-based image processing application is also proposed. Its efficiency, in terms of timing performance and power consumption, is proved via comparing it with a binary-based one. Finally, the main considerations that should be taken into account when choosing to use the binary number system or RNS are also discussed in details.
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Automatický systém pro sledování polohy
Brouček, Jan ; Younes, Dina (oponent) ; Šteffan, Pavel (vedoucí práce)
Bakalářská práce obsahuje návrh zařízení, které je schopné určit svoji polohu pomocí systému GPS. Zjištěné údaje o poloze jsou zaznamenávány na paměťovou kartu microSD a volitelně posílány pomocí sítě GSM na webový server, kde jsou zveřejňovány. Údaje jsou zaznamenávány ve formátu GPX, pro možnost jejich vyhodnocování v běžně dostupných programech, a zařízeních. Předpokládané využití zařízení je pro informativní sledování trasy pohyblivých objektů, nebo jako zabezpečovací zařízení automobilu, schopné na požádání téměř kdykoliv sdělit uživateli jeho polohu.
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Digital signal processing application based on residue number system
Rolko, Maroš ; Bohrn, Marek (oponent) ; Younes, Dina (vedoucí práce)
This work deals with residue number system and its applications in digital circuits. The first part is VHDL design of different adder types in residue number system and their comparison with regular adders. The second part is VHDL implementation of image processor that computes in residue number system and its performance analysis. Presented text contains description of design procedures and presentation of analysis results.
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Residue Number System Based Building Blocks for Applications in Digital Signal Processing
Younes, Dina ; Brzobohatý, Jaromír (oponent) ; Vlček, Čestmír (oponent) ; Šteffan, Pavel (vedoucí práce)
This doctoral thesis deals with designing residue number system based building blocks to enhance the performance of digital signal processing applications. The residue number system (RNS) is a non-weighted number system that provides carry-free, parallel, high speed, secure and fault tolerant arithmetic operations. These features make it very attractive to be used in high-performance and fault tolerant digital signal processing (DSP) applications. A typical RNS system consists of three main components; the first one is the binary to residue converter that computes the RNS equivalent of the inputs represented in the binary number system. The second component in this system is parallel residue arithmetic units that perform arithmetic operations on the operands already represented in RNS. The last component is the residue to binary converter, which converts the outputs back into their binary representation. The main aim of this thesis was to propose novel structures of the basic components of this system in order to be later used as fundamental units in DSP applications. This thesis encloses improving and designing novel structures of these components, simulating and verifying their efficiency via FPGA implementation. In addition to suggesting novel structures of basic RNS components, a detailed study on different moduli sets that compares and determines the most efficient one for different dynamic range requirements is also presented. One of the main outcomes of this thesis is concluding and verifying the main condition that should be met when choosing a moduli set, in order to improve the timing performance of a DSP application. An RNS-based image processing application is also proposed. Its efficiency, in terms of timing performance and power consumption, is proved via comparing it with a binary-based one. Finally, the main considerations that should be taken into account when choosing to use the binary number system or RNS are also discussed in details.
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