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Technological stage of the rough superstructure of the apartment building Hálkova Brno
Jedlička, Petr ; Nečasová, Barbora (referee) ; Doubek, Rostislav (advisor)
This bachelor's thesis focuses on the rough top construction of an apartment building on Hálkova Street in Brno. The thesis includes a technical report, a situation with broader traffic relations, site facilities, a bill of quantities for the technological stage, technological regulations, inspection and test plans. In addition, occupational health and safety for rough top construction is addressed. The last two chapters include a developed itemized budget for the rough top construction and a comparison of different materials for the vertical structures.
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Design and implementation of countermeasures against side-channel attacks on an FPGA platform
Kuřina, Petr ; Jedlička, Petr (referee) ; Dobiáš, Patrik (advisor)
Currently, significant progress is being made in the field of digital systems and cryptography, requiring adequate security against various forms of attacks. Special attention is paid to development on the FPGA (Field-Programmable Gate Array) platform, which provides flexibility and performance for implementing diverse applications, including cryptographic algorithms. This semester thesis focuses on the systematic analysis of possible leaks of sensitive information from the implementation of a cryptographic scheme on the FPGA platform. The FPGA platform is presented in the work, including HDL (Hardware Description Language) programming languages such as Verilog or VHDL. It then presents a general overview of side channels and their types, countermeasures, and a~detailed description of security techniques. The next chapter is the AES cryptographic scheme and a description of its operations. There is a chapter devoted to a comparison of current articles on the issue. The following is a description of a professional workplace, such as an oscilloscope or a Sakura-X (Sasebo-GIII) hardware board. In the final part, the measurement results are presented without any measures, only the AES algorithm is implemented, and then in the next part there is a countermeasure proposal, which is implemented and measured. The results are described and subsequently displayed in graphic form.
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Smart VoIP doorbell
Čecháček, Šimon ; Jedlička, Petr (referee) ; Caha, Tomáš (advisor)
This bachelor thesis focuses on the extension of an existing VoIP communicator on a single board computer Raspberry Pi, which uses the SIP protocol. The thesis introduces, among other things, an extension for one-way video transmission and conditional relay switching. The resulting communicator is able to make a call with two-way communication, execute a defined code using DTMF codes after authorization of the called user and switch a relay. The entire device is housed in a box printed on a 3D printer. The IT security of the proposed solution has been analyzed and the code and 3D model of the chassis are available on GitHub.
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Postquantum cryptography on FPGA
Győri, Adam ; Jedlička, Petr (referee) ; Smékal, David (advisor)
This work describes the post-quantum algorithm FrodoKEM, its hardware implementation in VHDL and software simulation of implementation, subsequent implementation of the implementation on the FPGA process system. The work describes the issue of postquantum cryptography and VHDL programming language used to describe the functionality of hardware. Furthermore, the work deals with the functional implementation and simulation of all parts of the algorithm. Specifically, these are parts, key generation, encapsulation, and decapsulation. Algorithm implementation and simulations were performed in the Vivado software simulation environment, created by Xilinx. Subsequently, the synthesis and implementation was performed and the Intellectual property block was designed, the key part of which covered the functionality of the NEXYS A7 FPGA board was not available. The last part of the work deals with the workflow algorithm for implementation on FPGA board NEXYS A7.
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Software GNSS receiver
Jedlička, Petr ; Bobula, Marek (referee) ; Záplata, Filip (advisor)
The thesis deals with the analysis and the reception of the freely available signals of the navigation satellites in the L1 and E1 bands of the GPS and Galileo systems. The described signal reception sections include the process of the acquisition, the carrier frequency and phase synchronization and tracking, the spreading code phase tracking, the signal demodulation and the channel decoding. The simulation of the entire receiver is performed in MATLAB. The deeply analyzed signal reception component is the one responsible for the carrier phase and frequency synchronization and tracking. In that case, more methods and their comparison are usually listed. The signal reception component, which is responsible for the carrier phase and frequency tracking and the spreading code phase tracking, is also implemented in FPGA.
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Web application demonstrating lattice-based cryptography
Sečkár, Martin ; Jedlička, Petr (referee) ; Ricci, Sara (advisor)
Zámer tejto práce je vyvinúť a implementovať webovú aplikáciu demonštrujúcu kryptografiu založenú na mriežkach. Aplikácia bola vyvinutá použitím programovacieho jazyku Python a kontajnerizačnej platformy Docker. Špecifickejšie, implementované moduly používajú knižnicu Bokeh a vlastnú JavaScript funkcionalitu, ktorá rozširuje danú knižnicu Bokeh. Tieto moduly sú poskytované serverom Flask, kde taktiež prebiehajú všetky výpočty pomocou knižnice numPy. Aplikácia obsahuje tri moduly popisujúce problém najbližšieho vektora, problém učenia s chybami a Boyenov kryptografický protokol založený na predchádzajúcom probléme. Užívatelia majú možnosť vizualizovať dvojdimenzionálne mriežky a prevádzať vybrané výpočty. Zdrojový kód je jednoducho rozšíriteľný a môže slúžiť ako náučná platforma. Práca taktiež obsahuje inštalačný a používateľský manuál.
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RF analog fiber optic link
Kelbler, Petr ; Jedlička, Petr (referee) ; Drexler, Petr (advisor)
This thesis analyzes the problem of design analog fiber optic link for transmission high frequency signals. Analog fiber optic link will be used in system for detection and localization a partial discharge activity MOSAD-PD-UHF, where will replace existing solution with coaxial cables, which is not appropriate for highly noise environment. MOSAD-PD-UHF system is developed in department of theoretical and experimental electrical engineering. At the first, MOSAD-PD-UHF system and individual parts of optical chain are theoretical described. In following part are compared a few commercially available analog fiber optic link and design of chosen transmit and receive module are described. . The thesis final part deals with construction of optical link and measured parameters are discussed.
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Cryptographic algorithms on FPGA
Broda, Jan ; Jedlička, Petr (referee) ; Hajný, Jan (advisor)
The master thesis is focused on developing a demonstrator which is able to transmit data not only between operating system and network FPGA card with a UltraScale+ chip but also between two network FPGA cards. The theoretical part of the master thesis describes FPGA, developing on FPGA, programming languges that are used and develoment enviroment Vivado Design Suite. The demonstrator consists of two applications developed in C language which are used for communication between operating system and the network FPGA card and two components developed in VHDL langague which are used for communication throught a network module on the network FPGA card. The demonstrator allows inserting cryptographic algorithm which would work with transmitted data. For developing on the network FPGA card was used a Network Development Kit provided by a Liberouter team from CESNET association.
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Cryptographic Escape Room Game
Nosek, Ondřej ; Jedlička, Petr (referee) ; Ricci, Sara (advisor)
Tato bakalářská práce se zabývá implementací únikové hry ve formě webové aplikace. Tématem jednotlivých místností je kryptografie v mnoha podobách. Konkrétně se uživatel aplikace zabývá modulární aritmetikou, systémem pro šifrování dat včetně jeho menších částí, jako je u Advanced Encryption Standard, nebo také základy síťové bezpečnosti. Hlavními cíli bakalářské práce je seznámení se s tématem únikových her, webových aplikací a realizace webové aplikace. Úniková hra obsahuje celkem čtyři pokoje. Práce popisuje volbu technologií, na kterých aplikace bude postavena, a postup implementace jednotlivých místností včetně možností řešení úkolů. V samotném závěru pak shrnuje dosažené výsledky a cíle.
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Autonegotiation implementation for 25 - 100 Gbps Ethernet interfaces
Válek, Vladislav ; Jedlička, Petr (referee) ; Tomašov, Adrián (advisor)
This bachelor's thesis addresses the design of the auto-negotiation component for network interface cards controlled by FPGAs. Auto-negotiation function allows to advertise the available communication parameters, like the link speed, the transmission pause ability or Forward Error Correction (FEC) ability, by either side of the common link and determine the common abilities, which will be used to establish a connection. In the beginning, the internal parts of Xilinx UltraScale+ FPGA family are introduced with greater emphasis on the description of GTY transceivers. In the next chapter are introduced the mechanisms of auto-negotiation function as described in clause 73 of the IEEE 802.3-2018 standard. The design here is created for Ethernet interfaces running at speed 25~Gbps and is written in VHDL language. The next chapter describes the necessary steps which are required for the implementation on the FPGAs, where high-speed transceivers are in use. Function of the created design was then checked within a simulation and the correspondent results are also provided in this thesis. In the end, the testing of the designed auto-negotiation component took place for which the network card with Vitex 7 UltraScale+ FPGA was used. The testing process includes the use of the Integrated Logic Analyzer (ILA) which was inserted into final design. The achieved results from testing of both, the auto-negotiation process and surrounding physical layer processes, are described here with proper commentary.
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