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Modularity in the Evolutionary Design
Klemšová, Jarmila ; Bidlo, Michal (referee) ; Vašíček, Zdeněk (advisor)
The diploma thesis deals with the evolutionary algorithms and their application in the area of digital circuit design. In the first part, general principles of evolutionary algorithms are introduced. This part includes also the introduction of genetic algorithms and genetic programming. The next chapter describes the cartesian genetic programming and its modifications like embedded, self-modifying or multi-chromosome cartessian genetic programming. Essential part of this work consists of the design and implementation of a modularization technique for evolution circuit design. The proposed approach is evaluated using a set of standard benchmark circuits.
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Evolutionary Circuit Design at the Transistor Level
Žaloudek, Luděk ; Vašíček, Zdeněk (referee) ; Sekanina, Lukáš (advisor)
This project deals with evolutionary design of electronic circuits with an emphasis on digital circuits. It describes the theoretical basics for the evolutionary design of circuits on computer systems, including the explanation of Genetic Programming and Evolutionary Strategies, possible design levels of electronic circuits, CMOS technology overview, also the overview of the most important evolutionary circuits design methods like development and Cartesian Genetic Programming. Next introduced is a new method of digital circuits design on the transistor level, which is based on CGP. Also a design system using this new method is introduced. Finally, the experiments performed with this system are described and evaluated.
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ALPS Technique in Cartesian Genetic Programming
Stanovský, Peter ; Slaný, Karel (referee) ; Sekanina, Lukáš (advisor)
This work introduces a brief summary of softcomputing and the solutions to NP-hard problems. It especially deals with evolution algorithms and their basic types. The next part involves the study of cartesian genetic programming, which belongs to the field of evolution algorithms, used mainly in the evolution of digital circuits, symbolic regression, etc. A special chapter is devoted to the studies of new technique Age layered population structure, which deals with the problems of premature convergence, which suggests the way of how the population could be divided into subpopulations split up according to the age criteria. Thanks to the maintaining of sufficient diversity, it achieves substantially better solutions in comparison to the classical evolution algorithms. This papier includes the suggestion of two ways of incorporation of the ALPS technique into CGP. In the next part of work there were carried out tests on the classic problems, that would be solved with evolution algorithms. These tests were made with and without using ALPS technique. In the part of work "Experimental results" there was discussed a contribution of using ALPS technique in CGP against the classic CGP.
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A Tool for Visual Analysis of Circuit Evolution
Staurovská, Jana ; Minařík, Miloš (referee) ; Sekanina, Lukáš (advisor)
The main goal of the master's thesis is to compose a study on cartesian genetic programming with focus on evolution of circuits and to design a concept for visualisation of this evolution. Another goal is to create a program to visualise the circuit evolution in cartesian genetic programming, its generations and chromosomes. The program is capable of visualising the changes between generations and chromosomes and comparing more chromosomes at once. Several user cases had been prepared for the resulting program.
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Polymorphic Image Filters
Salajka, Vojtěch ; Vašíček, Zdeněk (referee) ; Sekanina, Lukáš (advisor)
This thesis deals with the polymorphic image filter design. The study includes polymorphic circuits, their theoretical base and practical applications. It further focuses on the cartesian genetic programming that can be used for an evolutionary design of some types of image filters. The thesis continues with the specification of the evolutionary algorithm to be used for the design of the polymorphic image filters. The implementation of the algorithm is described in two versions -- a standard one running only on a CPU and an accelerated one that partially uses the GPU. Several polymorphic image filters are designed by means of the algorithm.
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Coevolutionary Algorithm in FPGA
Hrbáček, Radek ; Vašíček, Zdeněk (referee) ; Drahošová, Michaela (advisor)
This thesis deals with the design of a hardware acceleration unit for digital image filter design using coevolutionary algorithms. The first part introduces reconfigurable logic device technology that the acceleration unit is based on. The theoretical part also briefly characterizes evolutionary and coevolutionary algorithms, their principles and applications. Traditional image filter designs are compared with the biologically inspired design methods. The hardware unit presented in this thesis exploits dual MicroBlaze system extended by custom peripherals to accelerate cartesian genetic programming. The coevolutionary image filter design is accelerated up to 58 times. The hardware platform functionality in the task of impulse noise filter design and edge detector design has been empirically analyzed.
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Evolutionary Combinational Circuit Resynthesis
Pták, Ondřej ; Schwarz, Josef (referee) ; Sekanina, Lukáš (advisor)
This project deals with combinational digital circuits and their optimization. First there are presented main levels of abstraction utilized in the design of combinational digital circuits. Afterwards different methods are surveyed for optimization of combinational digital circuits. The next part of this project is mainly devoted to evolutionary algorithms, their common characteristics and branches: genetic algorithms, evolutionary strategies, evolutionary programming and genetic programming. The variant of genetic programming called Cartesian Genetic Programming (CGP) and the use of CGP in various areas, particularly in the synthesis and optimization of combinational logic circuits are described in detail. The project also discusses some modifications of CGP and the scalability problem of evolutionary circuit design. Consequential part of this thesis describes the method for evolution resynthesis of combinational digital circuits. There is description of design, especially the method of splitting circuits into subcircuits, and implementation details. Finally experiments with these method and their results are described.
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Regession Methods in Traffic Prediction
Vaňák, Tomáš ; Korček, Pavol (referee) ; Petrlík, Jiří (advisor)
Master thesis deals with possibilities of predicting traffic situation on the macroscopic level using data, that were recorded using traffic sensors. This sensors could be loop detectors, radar detectors or cameras. The main problem discussed in this thesis is the travel time of cars. A method for travel time prediction was designed and implemented as a part of this thesis. Data from real traffic were used to test the designed method. The first objective of this thesis is to become familiar with the prediction methods that will be used. The main objective is to use the acquired knowledge to design and to implement an aplication that will predict required traffic variables.
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Coevolution of Cartesian Genetic Algorithms and Neural Networks
Kolář, Adam ; Král, Jiří (referee) ; Zbořil, František (advisor)
The aim of the thesis is to verify synergy of genetic programming and neural networks. Solution is provided by set of experiments with implemented library built upon benchmark tasks. I've done experiments with directly and also indirectly encoded neural netwrok. I focused on finding robust solutions and the best calculation of configurations, overfitting detection and advanced stimulations of solution with fitness function. Generally better solutions were found using lower values of parameters n_c and n_r. These solutions tended less to be overfitted. I was able to evolve neurocontroller eliminating oscilations in pole balancing problem. In cancer detection problem, precision of provided solution was over 98%, which overcame compared techniques. I succeeded also in designing of maze model, where agent was able to perform multistep tasks.
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Design of Digital Circuits at Transistor Level
Kešner, Filip ; Šimek, Václav (referee) ; Vašíček, Zdeněk (advisor)
This work aims to design process of integrated circuits on the transistor level, specially using evolutionary algorithm. For this purpose it is necessary to choose reasonable level of abstraction during simulation, which is used for evaluation candidate solutions by fitness function. This simulation has to be fast enough to evaluate thousands of candidate solutions within seconds. This work discusses already used techniques for transistor level circuit design and it chooses useful parts for new design of faster and more reliable automated design process, which would be able to design complex logic circuits. The thesis also discusses implementation of this system and used approach with regard to encountered problems in transistor-level circuit design and optimization by evolution.
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