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Interface extension for power cell invertor control with FPGA
Matoušek, Petr ; Valach, Soběslav (referee) ; Petyovský, Petr (advisor)
The main goal of bachelor thesis is design and implementation of 2 modules in the Field-programmable gate array, which will be used as an extension to the control board of power inverter. The thesis includes the design and implementation of a module with several channels generating a pulse width modulated signal, which is controlled using the Serial Peripheral Interface. It also includes the design of a module with 9 serial lines in the Field-programmable gate array, which are controlled using the Serial Peripheral Interface. Part of the work contains a description of the peripherals used, a description of the operation of principle of the drive and the superior control system, a description of the implementation in the language for the description of Hardware and its testing.
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Modernization of educational exercises of the course Logical circuits and systems
Prášil, Pavel ; Holek, Radovan (referee) ; Petyovský, Petr (advisor)
This bachelor thesis deals with the design of an asynchronous serial receiver/transmitter and its implementation into the FPGA. The design will be used as a laboratory exercise in the course "Logical circuit and systems". This paper contains a description of the features of serial communication interface UART. The thesis includes the final design of an asynchronous serial receiver/transmitter and the simulation outputs of particular parts. The final design of UART will be used as a communication interface for music playback by the programmable multichannel sound generator. Design of the programmable multichannel sound generator is not a part of this thesis, but it has been taken from another bachelor thesis.
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Retargeting of the assembler language compiler
Navrátil, Jan ; Macho, Tomáš (referee) ; Petyovský, Petr (advisor)
This bachelor thesis describes a design and implementation of modification of retargetable compiler Flat Assembler G that provides a translation of assembly language for HCS08 microprocessor family. It describes current solutions in the design of assembly language compilers, existing retargetable compilers and their differences from Flat Assembler G. Furthermore, it shows process that can generate binary output in selected format with the compiler. Last part of this thesis is dedicated to testing of the correctness of the implementation and demonstration of the correctness on a real hardware.
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Smart garden control system
Antoš, Jan ; Petyovský, Petr (referee) ; Macho, Tomáš (advisor)
This bachelor thesis aims to design and implement a distributed control system concept for a smart garden. This system can measure individual physical variables, process the measured data, send it to a central unit and display it to the user. The measured data is then backed up in a database, which is linked to the web for visualisation.
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Detection of significant events in systems baased on phase OTDR
Makówka, David ; Petyovský, Petr (referee) ; Valach, Soběslav (advisor)
This diploma thesis concerns the design, implementation and testing of a system that classifies events captured using optic fiber along a perimeter of guarded objects. A theoretical part introduces physical principles, main structures of measuring systems, methods of measuring, data format, pre-processing options and classification using convolutional neural networks. A practical part describes implementation of a software for convolutional neural networks training and testing, process of samples extraction from measured data, its annotation and conversion to format required by neural networks. Results of measured data analysis and results of achieved classification accuracy using convolutional neural networks for both post processing of measured data and for deployment of neural network into real time processing system are presented.
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Innovation of the laboratory exercises for course Embedded Systems
Pončák, Matej ; Macho, Tomáš (referee) ; Petyovský, Petr (advisor)
The constant market development of the embedded systems requires an adaptation to this fact. Raspberry Pi has released the Raspberry Pi Pico development board with a 32-bit microcontroller ARM Cortex-M0+, which has the potential to use the board as an innovation in teaching embedded systems. The thesis describes this board and its properties, the course Embedded Systems and the possibilities of its innovation, and then describes the proposed HW platform and demonstrates. The creation of new laboratory assignments is also part of this thesis.
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Unary Classification of Image Data
Beneš, Jiří ; Petyovský, Petr (referee) ; Horák, Karel (advisor)
The work deals with an introduction to classification algorithms. It then divides classifiers into unary, binary and multi-class and describes the different types of classifiers. The work compares individual classifiers and their areas of use. For unary classifiers, practical examples and a list of used architectures are given in the work. The work contains a chapter focused on the comparison of the effects of hyperparameters on the quality of unary classification for individual architectures. Part of the submission is a practical example of implementation of the unary classifier.
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Detection of cellular processes in image sequences
Hatrinh, Hung Anh ; Richter, Miloslav (referee) ; Petyovský, Petr (advisor)
Překlad abstraktu (Tato bakalářská práce se zabývá segmentací buněk od obrazového pozadí a detekcí buněčných procesů v kvantitativních fázových obrazech získaných koherencí řízeným holografickým mikroskopem. Navržený algoritmus na segmentaci buněk využívá hranového detektoru watershedingu. Implemtován byl v programovacím jazyce C++ a využívá knihovny OpenCV. Detekce buněčných procesů je řešena metodami strojového učení v MATLABu.)
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Realization of educational multichannel sound generator
Homzová, Eliška ; Valach, Soběslav (referee) ; Petyovský, Petr (advisor)
The main goal of this bachelor thesis is an implementation of an educational multichannel sound circuit, which will be used as a laboratory exercise in the course called "Logical circuits and systems". This paper includes an overview of principles of multichannel sound generation, selection of a suitable architecture of programmable sound generator and its implementation into the FPGA. Part of the work is also a design of communication between development boards and PC.
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