Original title: Implementace rychlých sériových sběrnic v obvodech FPGA
Translated title: Implementation of fast serial bus on FPGA
Authors: Drbal, Jakub ; Dvořák, Vojtěch (referee) ; Pristach, Marián (advisor)
Document type: Master’s theses
Year: 2014
Language: cze
Publisher: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Abstract: [cze] [eng]

Keywords: differential signals; FPGA; LVDS; SATA.; Serial bus; VHDL; diferenční signály; FPGA; LVDS; SATA.; Sériová sběrnice; VHDL

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/32174

Permalink: http://www.nusl.cz/ntk/nusl-561655


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Master’s theses
 Record created 2024-04-02, last modified 2024-04-03


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