Original title:
Měření parametrů komunikace přes PCI Express
Translated title:
Measuring Parameters of Communication over PCI Express
Authors:
Matějka, Martin ; Martínek, Tomáš (referee) ; Matoušek, Jiří (advisor) Document type: Bachelor's theses
Year:
2022
Language:
cze Publisher:
Vysoké učení technické v Brně. Fakulta informačních technologií Abstract:
[cze][eng]
Táto bakalárska práca sa zaoberá vytvorením jednotky, ktorá je schopná merať parametre komunikácie na zbernicovom štandarde PCI Express 3.0. Navrhnutá jednotka je určená pre čip FPGA umiestnený na akceleračnej karte s PCI Express rozhraním. Zároveň opisuje softvér implementovaný v jazyku C, určený na jej ovládanie. V poslednej časti tejto práce sú ukázané experimenty s navrhnutou a implementovanou jednotkou.
This bachelor thesis describes designing a unit capable of measuring throughput on a PCI Express bus. The described unit is designed for an FPGA chip on an acceleration card with PCI Express 3.0 interface. At the same time, the thesis describes software implemented in C language used for its control. In the last section of this bachelor thesis are experiments conducted with the designed and implemented unit.
Keywords:
bus; maximum payload size; maximum read request size; PCI Express 3.0; relaxed ordering; throughput measurement; VHDL; FPGA; maximum payload size; maximum read request size; meranie priepustnosti; PCI Express 3.0; relaxed ordering; zbernica
Institution: Brno University of Technology
(web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library. Original record: http://hdl.handle.net/11012/207209