Original title: Testbed pro simulaci MCU aplikace v RTL prostředí
Translated title: Testbed for Simulation of MCU Application using RTL Environment
Authors: Ohnút, Petr ; Burian, František (referee) ; Arm, Jakub (advisor)
Document type: Master’s theses
Year: 2023
Language: cze
Publisher: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Abstract: [cze] [eng]

Keywords: FreeRTOS; NEORV32; RISC-V; Simulation; Soft-core; SystemVerilog; Vivado; FreeRTOS; NEORV32; RISC-V; Simulace; Soft-core; SystemVerilog; Vivado

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/209997

Permalink: http://www.nusl.cz/ntk/nusl-526502


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Master’s theses
 Record created 2023-06-18, last modified 2023-06-18


No fulltext
  • Export as DC, NUŠL, RIS
  • Share