Original title: Implementace šifrovacích algoritmů v jazyce VHDL
Translated title: Implementation of Encryption Algorithms in VHDL Language
Authors: Fruněk, Lukáš ; Fukač, Tomáš (referee) ; Kořenek, Jan (advisor)
Document type: Bachelor's theses
Year: 2021
Language: cze
Publisher: Vysoké učení technické v Brně. Fakulta informačních technologií
Abstract: [cze] [eng]

Keywords: AES; block cipher; counter mode; CTR; DES; encryption; FPGA; symmetric cipher; VHDL; AES; bloková šifra; CTR; DES; FPGA; režím čítače; symetrická šifra; VHDL; šifrování

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/199392

Permalink: http://www.nusl.cz/ntk/nusl-444788


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Bachelor's theses
 Record created 2021-06-27, last modified 2022-09-04


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