Original title: Reconfigurable image processing architecture with simulink prototyping support
Translated title: Rekonfigurovatelná architektura pro zpracování obrazu s podporou rychlého modelování v Simulinku
Authors: Schier, Jan ; Kovář, Bohumil ; Zemčík, P. ; Herout, A. ; Beran, V.
Document type: Papers
Conference/Event: MATLAB 05. Annual Conference of Technical Computing Prague 2005 /13./, Praha (CZ), 2005-11-15
Year: 2005
Language: eng
Abstract: [eng] [cze]

Keywords: DSP; embedded image processing; FPGA
Project no.: CEZ:AV0Z10750506 (CEP), 1ET400750408 (CEP)
Funding provider: GA AV ČR
Host item entry: Technical Computing Prague 2005. 13th Annual Conference Proceeding, ISBN 80-7080-577-3

Institution: Institute of Information Theory and Automation AS ČR (web)
Document availability information: Fulltext is available at the institute of the Academy of Sciences.
Original record: http://hdl.handle.net/11104/0116433

Permalink: http://www.nusl.cz/ntk/nusl-32889


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Research > Institutes ASCR > Institute of Information Theory and Automation
Conference materials > Papers
 Record created 2011-07-01, last modified 2024-01-26


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