Original title: Metodika pro testování vysokorychlostních FPGA karet
Translated title: Methodology for Testing of High-speed FPGA Cards
Authors: Šulc, Tomáš ; Oujezský, Václav (referee) ; Škorpil, Vladislav (advisor)
Document type: Master’s theses
Year: 2014
Language: cze
Publisher: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Abstract: [cze] [eng]

Keywords: Combo-20G card; Combo-80G card; FPGA; March C-; methodology; NetCOPE framework.; RAM faults; testing; Chyby pamětí RAM; Combo-20G; Combo-80G; FPGA; March C-; metodika; testování; vývojové prostředí NetCOPE.

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/31149

Permalink: http://www.nusl.cz/ntk/nusl-221009


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Master’s theses
 Record created 2016-06-03, last modified 2022-09-04


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