Original title: Implementation of AES Algorithm on FPGA
Authors: Smékal, D.
Document type: Papers
Language: cze
Publisher: Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
Abstract: This paper presents a VHDL (Very High Speed Integrated Circuit Hardware Description Language) implementation of 128-bit AES (Advanced Encryption Standard) on FPGA card (FieldProgrammable Gate Array) using Virtex-7 FPGA chip manufactured by Xilinx company. In this project our main concern is to implement all modules of this algorithm on hardware.
Keywords: AES; Cryptography; FPGA; VHDL
Host item entry: Proceedings of the 21st Conference STUDENT EEICT 2015, ISBN 978-80-214-5148-3

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/42973

Permalink: http://www.nusl.cz/ntk/nusl-207164


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Universities and colleges > Public universities > Brno University of Technology
Conference materials > Papers