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Concurrent evolutionary design of hardware and software
Minařík, Miloš ; Sekaj, Ivan (oponent) ; Squillero, Giovanni (oponent) ; Sekanina, Lukáš (vedoucí práce)
Genetic programming (GP) can, to some extent, automatically generate desired programs without asking the user to specify how to do it. It has been used to solve a wide range of practical problems and produce a number of human-competitive results in different fields. An interesting and practically untouched question is whether for a given problem, GP can generate a highly optimized programmable computational model (platform) together with a program running on the platform, solving the problem and satisfying all constrains such as on the area on a chip and speed. In a multi-objective scenario, the user would obtain a set of non-dominated solutions showing various tradeoffs between resources (the area, power consumption) and performance (the speed of execution). This problem can be seen as a concurrent development of hardware and software, simply, HW/SW codesign. This thesis explores the ways how to evolve hardware platforms together with programs in the case that the specification is given in terms of a set of input-output vectors. The initial model of the architecture was created and the evolutionary framework capable of maintaining and evolving the population of such architectures was implemented. Candidate microprogrammed architectures were evolved together with programs using extended linear genetic programming. Several simple experiments were carried out and the framework proved competitive with state-of-the-art methods. The framework was subsequently extended addressing the weak points identified during the initial experiments. The extended framework was validated by means of more complex experiments. One of them focused on an effective implementation of sigmoid function approximation. Various implementations of sigmoid approximation were evolved (sequentional as well as purely combinational). The proposed framework provided several well-known solutions and even optimized some of them for the particular input domain chosen for the experiment. The next set of experiments was supposed to evolve an image filter reducing salt-and-pepper impulse noise. The framework was able to evolve the concept of switching-based filter and even the variation of a switching-based median filter comparable to the filters commonly used. This thesis proved that small-size HW/SW systems can be designed and optimized by means of genetic programming. Moving to an automated evolutionary design of more complex HW/SW systems is an open research problem waiting for a future research.
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Evolutionary Approach to Synthesis and Optimization of Ordinary and Polymorphic Circuits
Gajda, Zbyšek ; Schmidt, Jan (oponent) ; Zelinka,, Ivan (oponent) ; Sekanina, Lukáš (vedoucí práce)
This thesis deals with the evolutionary design and optimization of ordinary and polymorphic circuits. New extensions of Cartesian Genetic Programming (CGP) that allow reducing of the computational time and obtaining more compact circuits are proposed and evaluated. Second part of the thesis is focused on new methods for synthesis of polymorphic circuits. Proposed methods, based on polymorphic binary decision diagrams and polymorphic multiplexing, extend the ordinary circuit representations with the aim of including polymorphic gates. In order to reduce the number of gates in circuits synthesized using proposed methods, an evolutionary optimization based on CGP is implemented and evaluated. The implementations of polymorphic circuits optimized by CGP represent the best known solutions if the number of gates is considered as the target criterion.
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Acceleration Methods for Evolutionary Design of Digital Circuits
Vašíček, Zdeněk ; Miller, Julian (oponent) ; Zelinka,, Ivan (oponent) ; Sekanina, Lukáš (vedoucí práce)
Although many examples showing the merits of evolutionary design over conventional design techniques utilized in the field of digital circuits design have been published, the evolutionary approaches are usually hardly applicable in practice due to the various so-called scalability problems. The scalability problem represents a general problem that refers to a situation in which the evolutionary algorithm is able to provide a solution to a small problem instances only. For example, the scalability of evaluation of a candidate digital circuit represents a serious issue because the time needed to evaluate a candidate solution grows exponentially with the increasing number of primary inputs. In this thesis, the scalability problem of evaluation of a candidate digital circuit is addressed. Three different approaches to overcoming this problem are proposed. Our goal is to demonstrate that the evolutionary design approach can produce interesting and human competitive solutions when the problem of scalability is reduced and thus a sufficient number of generations can be utilized. In order to increase the performance of the evolutionary design of image filters, a domain specific FPGA-based accelerator has been designed. The evolutionary design of image filters is a kind of regression problem which requires to evaluate a large number of training vectors as well as generations in order to find a satisfactory solution. By means of the proposed FPGA accelerator, very efficient nonlinear image filters have been discovered. One of the discovered implementations of an impulse noise filter consisting of four evolutionary designed filters is protected by the Czech utility model. A different approach has been introduced in the area of logic synthesis. A method combining formal verification techniques with evolutionary design that allows a significant acceleration of the fitness evaluation procedure was proposed. The proposed system can produce complex and simultaneously innovative designs, overcoming thus the major bottleneck of the evolutionary synthesis at gate level. The proposed method has been evaluated using a set of benchmark circuits and compared with conventional academia as well as commercial synthesis tools. In comparison with the conventional synthesis tools, the average improvement in terms of the number of gates provided by our system is approximately 25%. Finally, the problem of the multiple constant multiplier design, which belongs to the class of problems where a candidate solution can be perfectly evaluated in a short time, has been investigated. We have demonstrated that there exists a class of circuits that can be evaluated efficiently if a domain knowledge is utilized (in this case the linearity of components).
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Evoluční optimalizace analogových obvodů
Mihulka, Tomáš ; Zachariášová, Marcela (oponent) ; Bidlo, Michal (vedoucí práce)
Cílem práce bylo vytvořit systém pro optimalizaci vybraných analogových obvodů pomocí evoluce s různými fitness funkcemi. Taktéž na tomto systému provádět sadu experimentů a na jejich základě vyhodnotit možnosti evoluční optimalizace analogových obvodů. Prerekvizitou k tomuto cíli bylo nastudování a vybrání určitých typů analogových obvodů a evolučních algoritmů. Pro účely této práce byly z analogových obvodů vybrány zesilovače a oscilátory. Jako zástupci evolučních algoritmů byli zvoleni genetický algoritmy a evoluční strategie.
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Model-based evolutionary optimization methods
Bajer, Lukáš ; Holeňa, Martin (vedoucí práce) ; Brockhoff, Dimo (oponent) ; Pošík, Petr (oponent)
Statistické modely se používají pro urychlení optimalizace jak v akademické sféře, tak v průmyslu. Právě v reálných aplikacích, kde je optimalizovaná funkce často finančně nebo časově náročná, mohou statistické modely ušetřit zdroje nebo urychlit optimalizaci. Každá ze tří částí dizertační práce se zabývá jedním takovým modelem: v první části práce nahrazují kopule grafické modely v algoritmech odhadující distribuci, RBF sítě slouží jako náhradní model v genetických algoritmech pro kombinaci spojitých a diskrétních proměnných ve druhé části a třetí část práce používá gaussovské procesy jednak jako model pro vzorkování v bayesovských optimalizačních algoritmech, jednak jako náhradní model v evoluční strategii adaptující kovarianční matici (CMA-ES). Poslední kombinaci, která je popsána klíčové části práce, využívá navržený algoritmus DTS-CMA-ES---dvojitě trénovaný CMA-ES s náhradním modelem. Tento algoritmus využívá nejistotu predikovanou gaussovským procesem, aby vybral část populace CMA-ES k ohodnocení drahou originální funkcí, zatímco zbytek populace je ohodnocen modelem---predikovanou nejpravděpodobnější hodnotou. Výsledky ukázaly, že DTS-CMA-ES konverguje na několika syntetických funkcích rychleji než současné spojité optimalizační algoritmy s náhradním modelem.
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Concurrent evolutionary design of hardware and software
Minařík, Miloš ; Sekaj, Ivan (oponent) ; Squillero, Giovanni (oponent) ; Sekanina, Lukáš (vedoucí práce)
Genetic programming (GP) can, to some extent, automatically generate desired programs without asking the user to specify how to do it. It has been used to solve a wide range of practical problems and produce a number of human-competitive results in different fields. An interesting and practically untouched question is whether for a given problem, GP can generate a highly optimized programmable computational model (platform) together with a program running on the platform, solving the problem and satisfying all constrains such as on the area on a chip and speed. In a multi-objective scenario, the user would obtain a set of non-dominated solutions showing various tradeoffs between resources (the area, power consumption) and performance (the speed of execution). This problem can be seen as a concurrent development of hardware and software, simply, HW/SW codesign. This thesis explores the ways how to evolve hardware platforms together with programs in the case that the specification is given in terms of a set of input-output vectors. The initial model of the architecture was created and the evolutionary framework capable of maintaining and evolving the population of such architectures was implemented. Candidate microprogrammed architectures were evolved together with programs using extended linear genetic programming. Several simple experiments were carried out and the framework proved competitive with state-of-the-art methods. The framework was subsequently extended addressing the weak points identified during the initial experiments. The extended framework was validated by means of more complex experiments. One of them focused on an effective implementation of sigmoid function approximation. Various implementations of sigmoid approximation were evolved (sequentional as well as purely combinational). The proposed framework provided several well-known solutions and even optimized some of them for the particular input domain chosen for the experiment. The next set of experiments was supposed to evolve an image filter reducing salt-and-pepper impulse noise. The framework was able to evolve the concept of switching-based filter and even the variation of a switching-based median filter comparable to the filters commonly used. This thesis proved that small-size HW/SW systems can be designed and optimized by means of genetic programming. Moving to an automated evolutionary design of more complex HW/SW systems is an open research problem waiting for a future research.
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Model-based evolutionary optimization methods
Bajer, Lukáš ; Holeňa, Martin (vedoucí práce) ; Brockhoff, Dimo (oponent) ; Pošík, Petr (oponent)
Statistické modely se používají pro urychlení optimalizace jak v akademické sféře, tak v průmyslu. Právě v reálných aplikacích, kde je optimalizovaná funkce často finančně nebo časově náročná, mohou statistické modely ušetřit zdroje nebo urychlit optimalizaci. Každá ze tří částí dizertační práce se zabývá jedním takovým modelem: v první části práce nahrazují kopule grafické modely v algoritmech odhadující distribuci, RBF sítě slouží jako náhradní model v genetických algoritmech pro kombinaci spojitých a diskrétních proměnných ve druhé části a třetí část práce používá gaussovské procesy jednak jako model pro vzorkování v bayesovských optimalizačních algoritmech, jednak jako náhradní model v evoluční strategii adaptující kovarianční matici (CMA-ES). Poslední kombinaci, která je popsána klíčové části práce, využívá navržený algoritmus DTS-CMA-ES---dvojitě trénovaný CMA-ES s náhradním modelem. Tento algoritmus využívá nejistotu predikovanou gaussovským procesem, aby vybral část populace CMA-ES k ohodnocení drahou originální funkcí, zatímco zbytek populace je ohodnocen modelem---predikovanou nejpravděpodobnější hodnotou. Výsledky ukázaly, že DTS-CMA-ES konverguje na několika syntetických funkcích rychleji než současné spojité optimalizační algoritmy s náhradním modelem.
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Evoluční optimalizace analogových obvodů
Mihulka, Tomáš ; Zachariášová, Marcela (oponent) ; Bidlo, Michal (vedoucí práce)
Cílem práce bylo vytvořit systém pro optimalizaci vybraných analogových obvodů pomocí evoluce s různými fitness funkcemi. Taktéž na tomto systému provádět sadu experimentů a na jejich základě vyhodnotit možnosti evoluční optimalizace analogových obvodů. Prerekvizitou k tomuto cíli bylo nastudování a vybrání určitých typů analogových obvodů a evolučních algoritmů. Pro účely této práce byly z analogových obvodů vybrány zesilovače a oscilátory. Jako zástupci evolučních algoritmů byli zvoleni genetický algoritmy a evoluční strategie.
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Urychlení evolučních algoritmů pomocí rozhodovacích stromů a jejich zobecnění
Klíma, Jan ; Holeňa, Martin (vedoucí práce) ; Hauzar, David (oponent)
Evoluční algoritmy jsou jednou z nejúspěšnějších metod pro řešení netradičních optimalizačních problémů. Protože evoluční algoritmy používají pouze funkční hodnoty cílové funkce, blíží s k jejímu optimu mnohem pomaleji než optimalizační metody pro hladké funkce. Tato vlastnost evolučních algoritmů je zvláště nevýhodná v kontextu nákladného a časově náročného empirického způsobu získávání hodnot cílové funkce. Evoluční algoritmy však lze podstatně urychlit použitím dostatečně přesného regresního modelu cílové funkce. Cílem práce je výzkum využitelnosti regresních stromů a regresních lesů jako náhradního modelu k urychlení evoluční optimalizace empirických cílových funkcí.
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Acceleration Methods for Evolutionary Design of Digital Circuits
Vašíček, Zdeněk ; Miller, Julian (oponent) ; Zelinka,, Ivan (oponent) ; Sekanina, Lukáš (vedoucí práce)
Although many examples showing the merits of evolutionary design over conventional design techniques utilized in the field of digital circuits design have been published, the evolutionary approaches are usually hardly applicable in practice due to the various so-called scalability problems. The scalability problem represents a general problem that refers to a situation in which the evolutionary algorithm is able to provide a solution to a small problem instances only. For example, the scalability of evaluation of a candidate digital circuit represents a serious issue because the time needed to evaluate a candidate solution grows exponentially with the increasing number of primary inputs. In this thesis, the scalability problem of evaluation of a candidate digital circuit is addressed. Three different approaches to overcoming this problem are proposed. Our goal is to demonstrate that the evolutionary design approach can produce interesting and human competitive solutions when the problem of scalability is reduced and thus a sufficient number of generations can be utilized. In order to increase the performance of the evolutionary design of image filters, a domain specific FPGA-based accelerator has been designed. The evolutionary design of image filters is a kind of regression problem which requires to evaluate a large number of training vectors as well as generations in order to find a satisfactory solution. By means of the proposed FPGA accelerator, very efficient nonlinear image filters have been discovered. One of the discovered implementations of an impulse noise filter consisting of four evolutionary designed filters is protected by the Czech utility model. A different approach has been introduced in the area of logic synthesis. A method combining formal verification techniques with evolutionary design that allows a significant acceleration of the fitness evaluation procedure was proposed. The proposed system can produce complex and simultaneously innovative designs, overcoming thus the major bottleneck of the evolutionary synthesis at gate level. The proposed method has been evaluated using a set of benchmark circuits and compared with conventional academia as well as commercial synthesis tools. In comparison with the conventional synthesis tools, the average improvement in terms of the number of gates provided by our system is approximately 25%. Finally, the problem of the multiple constant multiplier design, which belongs to the class of problems where a candidate solution can be perfectly evaluated in a short time, has been investigated. We have demonstrated that there exists a class of circuits that can be evaluated efficiently if a domain knowledge is utilized (in this case the linearity of components).
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