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Analog switch for switched current circuits
Jahn, Michal ; Kledrowetz, Vilém (referee) ; Pavlík, Michal (advisor)
This bachelor’s deals with a design of analog switches using switched current technique and CMOS technology. The design of these switches was implemented and subsequently simulated in the CADENCE environment where the emphasis was on suppression of transient processes. It is a charge injection error and a clock-feedthrough error when charging the capacities of channel during switching on or opening.
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Design of low-voltage supply and reference block based on the bandgap reference
Mudroch, Michal ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
In this diploma thesis there is elaborated design of low-voltage power supply block using I3T25 technology. The theoretical part describes the basic structures used in the design, using CMOS and bipolar devices. Furthermore, the properties and the analysis used in the evaluation are described. In the design part there is an elaborated design of individual parts, including voltage references, current references, DAC converter, operational amplifier. In the last part, the power supply block is subjected to simulations for verification of temperature compensated output variables and analyzed circuit functionality.
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Channel Merging Techniques for improving Dynamic Range of ± 10 V Signal Chain Channel
Dušek, Samuel ; Prokop, Roman (referee) ; Kledrowetz, Vilém (advisor)
Cílem této diplomové práce je změřit a vyhodnotit parametry techniky slučování kanálů, která je momentálně implementována v součástce AD7606C firmy Analog Devices. Poté, na základě výsledků z měření, navrhnout a odsimulovat několik možností, pomocí kterých by tato technika mohla dosahovat vyšších hodnot dynamického rozsahu a celkového harmonického zkreslení. V průběhů práce bylo zjištěno, že pomocí zvýšení zesílení kanálu s nižším rozsahem společně se snížením mezní frekvence celého signálového řetězce může tato technika dosahovat až 118.6 dB dynamického rozsahu, což je o 3.6 dB více, než bylo změřeno na AD7606C. Dále také bylo zjištěno, že pomocí jednoduchého algoritmu implementovaného v logickém bloku, je možné dosáhnout imunity vůči hodnotě externího rezistoru, který zákazníci používají jako součást anti-aliasingového filtru.
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Universal Emulation Platform for Checking the Designs of the Integrated Circuits
Podzemný, Jakub ; Kledrowetz, Vilém (referee) ; Prokop, Roman (advisor)
This work deals with verification possibilities of integrated circuits, especially with hardware emulation. The first part of the text briefly describes designing process of an integrated circuit, which includes emulation using emulation platforms. The main part of this work deals with the innovation of the emulation platform, which is used by SCG Czech Design Center s. r. o. Possible ways to improve the current emulation platform are explored and further taken into account when designing a universal emulation platform. Last part of this work deals with functional verification of the proposed universal emulation platform. Functionality will be verified by emulation of the basic control functions of the NCP1246 circuit.
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Graphical user interface for filter design
Tesařík, Jan ; Kledrowetz, Vilém (referee) ; Pristach, Marián (advisor)
This work deals with design of program that allows to generate VHDL description from connection of filters. Its main aim is to create graphical extension on existing program and connect it to VHDL generator. Output from program will be XML file of created connection and generated VHDL description. Design of program was done by using Qt Framework environment and C++ language.
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