|
|
Mapping of Match Tables from P4 Language to FPGA Technology
Kekely, Michal ; Matoušek, Jiří (referee) ; Kořenek, Jan (advisor)
This thesis deals with design and implementation of mapping of match action tables from P4 language to FPGA technology. Goal of the thesis was to describe key principles, which need to be understood in order to design such a mapping and function of algorithms needed, apply these principles by implementing them and analyze the speed and memory requirements of such an implementation. Outcome provides configurable hardware unit capable of classifying packets and connection between the unit and match action tables from P4 language. The implementation is based on DCFL algorithm and requires less memory compared to HiCuts and HyperCuts algorithms while being comparably fast at worst-case scenarios.
|
|
|
TCP/IP Layer for FPGA
Kekely, Michal ; Korček, Pavol (referee) ; Kajan, Michal (advisor)
This bachelor thesis deals with the design and implementation of network communication using network protocols TCP and IP in hardware. Goal of this thesis is to design and implement unit capable of this sort of network communication using aforementioned protocols in FPGA and also to test and verify it. Outcome should give hardware devices, which don't have access to suitable software, the opportunity to communicate using computer networks.
|
|
|
Mapping of Match Tables from P4 Language to FPGA Technology
Kekely, Michal ; Matoušek, Jiří (referee) ; Kořenek, Jan (advisor)
This thesis deals with design and implementation of mapping of match action tables from P4 language to FPGA technology. Goal of the thesis was to describe key principles, which need to be understood in order to design such a mapping and function of algorithms needed, apply these principles by implementing them and analyze the speed and memory requirements of such an implementation. Outcome provides configurable hardware unit capable of classifying packets and connection between the unit and match action tables from P4 language. The implementation is based on DCFL algorithm and requires less memory compared to HiCuts and HyperCuts algorithms while being comparably fast at worst-case scenarios.
|
|
|
TCP/IP Layer for FPGA
Kekely, Michal ; Korček, Pavol (referee) ; Kajan, Michal (advisor)
This bachelor thesis deals with the design and implementation of network communication using network protocols TCP and IP in hardware. Goal of this thesis is to design and implement unit capable of this sort of network communication using aforementioned protocols in FPGA and also to test and verify it. Outcome should give hardware devices, which don't have access to suitable software, the opportunity to communicate using computer networks.
|
guest ::
