|
|
C Compiler for AVR32 Microprocesor
Nagy, Michal ; Husár, Adam (referee) ; Hruška, Tomáš (advisor)
This bachelor's thesis deals with creation of an AVR32 backend for the LLVM compiler framework. The core of this work consists of explaining the way of architecture description in LLVM and of my own implementation of the AVR32 backend. Furthermore, several problems encountered during the implementation are discussed along with their possible solutions. As the result of this work functional backend, with a few constraints discussed in the conclusion chapter, was created.
|
|
|
Accounting Module of the Company Information System
Machala, Ondřej ; Husár, Adam (referee) ; Kříž, Jiří (advisor)
The subject of this project is the development of accounting module of the information system in company inLink CZ, s.r.o. The first part deals with the analysis of needs about accounting transactions, the relevant documents and subsequent financial analysis, selection of appropriate tools for the implementation and determination of the theoretical foundations. The practical part is focused on my own design solution, its implementation and deployment operations. The final part analyzes the usability and benefits of the project.
|
|
|
Debugger for Generic Microprocessor Simulators
Wilczák, Milan ; Husár, Adam (referee) ; Přikryl, Zdeněk (advisor)
Application specific instruction set processors become part of every day life although it's not always visible at first sight. During their development it's needed to somehow describe their architecture, instruction set and behavior. To make their developement worth, it's necessary to be able to create applications for these processors and during application development errors are always made. Debuggers serve to discover and help fixing them. This paper summarises some basic information to debugger development and describes implementation for processors created using the Lissom project.
|
|
|
Implementation of Generic VLIW Processor in FPGA
Kuběna, Petr ; Přikryl, Zdeněk (referee) ; Husár, Adam (advisor)
VLIW processors are parallel computing devices that are used in embedded devices as well as in servers. My thesis contains description of this architecture. It is aimed at making and subsequently implementing design of custom general-purpose VLIW processor with wide range of configurable parameters. Operational implementation of such processor in VHDL which can be tested on FITkit platform is an integral part.
|
|
|
Co-Simulation of Microprocessor and Peripheral Devices
Frühbauer, Jan ; Husár, Adam (referee) ; Hruška, Tomáš (advisor)
The aim of this thesis is to analyze various kinds of co-simulation techniques and to design integration these techniques into Lissom simulation platform. The first section of this thesis shows capabilities of external interfaces of simulation platforms for HDL languages VHDL, Verilog and SystemVerilog and of tool Matlab. The second section deals with design of synchronization mechanism among Lissom simulation platform and others simulation platforms using mentioned external interfaces. In the last part the testing of implemented solutions and evaluation of results is described.
|
|
| |
|
|
Tools for Executable File Format Conversions
Matula, Peter ; Husár, Adam (referee) ; Hruška, Tomáš (advisor)
This paper describes methods and procedures used for object file format conversions. It introduces several commonly used formats (ELF, PE, E32Image, DEX) and project Lissom's object file format (LOFF). It contains basic information about libraries manipulating these formats and a description of a new library managing E32Image. The primary objective is to implement a program converting files between common formats and LOFF. This problem is solved by mapping all critical information from one format structures to another. To accomplish this task, it was necessary to modify and extend some features of Lissom object format. The result is the plugin based application capable of creating valid and runnable executable files in mentioned formats.
|
|
|
Scriptable Fight System for Turn-Based Computer Game
Kanich, Ondřej ; Dolíhal, Luděk (referee) ; Husár, Adam (advisor)
This bachelor's thesis deals with creation of fight system and artificial intelligence for it. The goal of this project is to give an opportunity for low-experienced programmers to design and implement their own artificial intelligence. The Project DrdSim is used as a platform for this thesis. Extended fight system of the Dragon's lair (Czech version of D&D) is employed as a model for created system. Artificial intelligence is implemented by DSL, special language of DrdSim platform. An approach of reactive agents is used for artificial intelligence.
|
|
| |
|
|
Design and Implementation of Company Information System Connection to Economic Software
Machala, Ondřej ; Husár, Adam (referee) ; Neuwirth, Bernard (advisor)
The aim of this thesis is the analysis, design and implementation of a data bridge between the information system of the company Sledovanitv.cz, s.r.o. and the economic system. The first part describes the objectives of the project. The theoretical part provides the necessary foundation for the implementation and, in addition to the theoretical background of information systems as a whole it presents and describes the technologies used for the execution of the implementation. The needs and requirements for future expansion are determined based on the analysis of the current situation. The practical part introduces a proposed solution, the method and procedure of implementation. In the final part, the author gives an assessment of the practical and economic benefits of the project.
|
guest ::
