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Liquid Crystal-Based Computational Platform
Klázar, Jakub ; Šimek, Václav (referee) ; Bidlo, Michal (advisor)
This work explores the possibilities of computations in a liquid crystal, specifically focusing on the logical operations. The text focuses on the design, build and use of a platform for performing experiments on computation in a liquid crystal. The platform is a device to which an LCD display can be connected as a experimental liquid crystal and experiments can be controlled from a computer through this platform. Experiments use, among other things, evolutionary algorithms. Further, the paper deals with the execution of experiments, discussion and processing of results and then creating conclusions of it.
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Measurement of Isolated Cardiac Muscle Cell Lenght in real time
Klabal, Petr ; Sekora, Jiří (referee) ; Chmelař, Milan (advisor)
Diploma thesis deals with the basic description of cardiac muscle cells, the mechanism of its contraction and events associated with contractions. There are different types of methods which can be used for measuring of contractions and for evaluation of cell length. This work describe these methods and evaluate their pros and cons. Based on available information and technical possibilities is one of the methods chosen and used for the design of block diagram system for measuring of contraction of isolated heart cells in real time. The practical part of this diploma thesis deals with the designing of a system which allows processing the image of isolated cardiac muscle cells that facilitate the detection of the cells edge. For this purpose it was created a device that allows the user to select a single row from television signal containing the image information from a location where is the currently selected row. Thus obtained image information can be used for cells edge detection and measuring of its length and contractions.
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The Testing Eqipment for Digital Circuit
Urbánek, Petr ; Bohrn, Marek (referee) ; Šteffan, Pavel (advisor)
This bachelor’s thesis deals with a device designed for testing digital circuits, especially logic gates and operational amplifiers. This equipment will be used by laboratory exercises, so it will check the operational status of components. The unit will used to display LCD, which will help interact with and will enable connect to PC via the USB bus.
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A Generator of Arithmetic Circuits
Klhůfek, Jan ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The aim of this bachelor thesis is to present the design and implementation of an arithmetic circuit generator. The generator focuses on generating various output representations of arithmetic circuits in flattened and hierarchical forms using the Python programming language. The work first deals with the specification of HW structures of individual arithmetic circuits and the corresponding ways of describing these structures into various representations. Followed by an introduction to the concept and details of the implementation of a tool called ArithsGen, which is able to generate arithmetic circuits and export them to various output representations. The output representations are then used for fast and simple simulation of the designed circuits (C), to describe the hardware structures and perform logic synthesis (Verilog), to formal verify the designs (BLIF) or to globally optimize the circuits using the evolutionary strategy (CGP). Finally, the generated representations were individually tested and compared with each other using the results obtained from logic synthesis.
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Approximation of Digital Circuits in Yosys Tool
Plevač, Lukáš ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The goal of this work is introduction of cgploss extension. This extension is extension for combinational logic circuits optimization in Yosys tool. Cartesian genetic programming is introduced in the first part of this work. Cartesian genetic programming is a design and optimization method that can be used for circuit optimization and approximation. This chapter introduces representation of combinational logic circuits for Cartesian genetic programming. The next chapter introduces Yosys tool and possibilities of the Yosys extending. The proposed 'cgploss' extension is introduced in the next chapter. The chapter also provides details about the implementation and the usage. The last chapter tests cgploss extension and compares representation of combinational logic circuits.
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Liquid Crystal-Based Computational Platform
Klázar, Jakub ; Šimek, Václav (referee) ; Bidlo, Michal (advisor)
This work explores the possibilities of computations in a liquid crystal, specifically focusing on the logical operations. The text focuses on the design, build and use of a platform for performing experiments on computation in a liquid crystal. The platform is a device to which an LCD display can be connected as a experimental liquid crystal and experiments can be controlled from a computer through this platform. Experiments use, among other things, evolutionary algorithms. Further, the paper deals with the execution of experiments, discussion and processing of results and then creating conclusions of it.
|
|
|
Approximation of Digital Circuits in Yosys Tool
Plevač, Lukáš ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The goal of this work is introduction of cgploss extension. This extension is extension for combinational logic circuits optimization in Yosys tool. Cartesian genetic programming is introduced in the first part of this work. Cartesian genetic programming is a design and optimization method that can be used for circuit optimization and approximation. This chapter introduces representation of combinational logic circuits for Cartesian genetic programming. The next chapter introduces Yosys tool and possibilities of the Yosys extending. The proposed 'cgploss' extension is introduced in the next chapter. The chapter also provides details about the implementation and the usage. The last chapter tests cgploss extension and compares representation of combinational logic circuits.
|
|
|
A Generator of Arithmetic Circuits
Klhůfek, Jan ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The aim of this bachelor thesis is to present the design and implementation of an arithmetic circuit generator. The generator focuses on generating various output representations of arithmetic circuits in flattened and hierarchical forms using the Python programming language. The work first deals with the specification of HW structures of individual arithmetic circuits and the corresponding ways of describing these structures into various representations. Followed by an introduction to the concept and details of the implementation of a tool called ArithsGen, which is able to generate arithmetic circuits and export them to various output representations. The output representations are then used for fast and simple simulation of the designed circuits (C), to describe the hardware structures and perform logic synthesis (Verilog), to formal verify the designs (BLIF) or to globally optimize the circuits using the evolutionary strategy (CGP). Finally, the generated representations were individually tested and compared with each other using the results obtained from logic synthesis.
|
|
|
The Testing Eqipment for Digital Circuit
Urbánek, Petr ; Bohrn, Marek (referee) ; Šteffan, Pavel (advisor)
This bachelor’s thesis deals with a device designed for testing digital circuits, especially logic gates and operational amplifiers. This equipment will be used by laboratory exercises, so it will check the operational status of components. The unit will used to display LCD, which will help interact with and will enable connect to PC via the USB bus.
|
|
|
Measurement of Isolated Cardiac Muscle Cell Lenght in real time
Klabal, Petr ; Sekora, Jiří (referee) ; Chmelař, Milan (advisor)
Diploma thesis deals with the basic description of cardiac muscle cells, the mechanism of its contraction and events associated with contractions. There are different types of methods which can be used for measuring of contractions and for evaluation of cell length. This work describe these methods and evaluate their pros and cons. Based on available information and technical possibilities is one of the methods chosen and used for the design of block diagram system for measuring of contraction of isolated heart cells in real time. The practical part of this diploma thesis deals with the designing of a system which allows processing the image of isolated cardiac muscle cells that facilitate the detection of the cells edge. For this purpose it was created a device that allows the user to select a single row from television signal containing the image information from a location where is the currently selected row. Thus obtained image information can be used for cells edge detection and measuring of its length and contractions.
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