National Repository of Grey Literature 25 records found  1 - 10nextend  jump to record: Search took 0.01 seconds. 
DMA Controller and Network Interface Card Driver for COMBO2 Platform
Kaštovský, Petr ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor)
There is a family of COMBO cards used for netork monitoring acceleration being developed on the Liberouter project, which is the CESNET's research activity. These cards are equipped with Xilinx's programmable field array. To enable usage of classic tools for network monitoring and management, not only application specific tools, it is necessary to implement network interface card on the platform, that realizes packet reception and transmission through the standard Linux kernel interface. This thesis describes the design and implementation of network interface card's key components. Those are DMA controller and Linux device driver.
Adaptive Sampling of Input Packets Implemented in FlowMon Probe
Kaštovský, Petr ; Martínek, Tomáš (referee) ; Kořenek, Jan (advisor)
There is a FlowMon probe being developed in a Libeouter project that is used for passive network measurements. The probe has better stability and accuracy than sofware based solutions even under a heavy load or network attack. To guarantee a precision of results there is a need to data reduction to prevent measuring system overload. There are few kinds of data reduction. Method used in the FlowMon probe is called sampling. Adaptive sampling unit sets the sampling rate (rate of processed and discarded packets) according to actual state of measured network.
Network Applications Acceleration
Štourač, Jan ; Korček, Pavol (referee) ; Puš, Viktor (advisor)
There has been developed family of cards called COMBO under the auspices of the CESNET association. These cards carry programmable field array and their purpose is intended into accelerating of net traffic. There is also a platform called NetCOPE which is based on these cards and it's purpose is to accelerate and simplify the development of network applications. This thesis contains a detailed analysis of data throughput through a whole platform and describes some possible improvements which should reflect in a better performance of the whole platform.
Verification of FPGA Generic Interconnection System
Bartoš, Václav ; Martínek, Tomáš (referee) ; Puš, Viktor (advisor)
This thesis deals with design, implementation and realization of simulation verification of generic interconnection system for FPGA chips. This system is part of the NetCOPE platform developed in the Liberouter project, within which was this work done. In the beginning, an usual methods of verification in SystemVerilog language are described. Then there is a brief description of the interconnection system, aimed especially to aspects important to verification. The main part of the thesis is design of verification environment and control program of test for all three components of the tested system. It started form the earlier described principles, that are established in the Liberouter project, and it add some more features. All components of the verification environment are designed to be general and reusable, so they can be used also in other verifications related to the interconnection system. At the end of the thesis, there are discussed results of the verification, found bugs and the general advantages of simulation verifications.
Processing Unit for Analysis and Modification of Network Traffic
Pazdera, Jan ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor)
This paper deals with the design and implementation of the Processing Unit for Analysis and Modification of Network Traffic. The proposed unit is intended to analyse an incoming network traffic and perform packet header editations to provide the proper packet delivery. The designed architecture has the following characteristics. It is based on the stream processor concept which allows to process independent stream elements (i.e. packets) in parallel. Multiply stream clients can be used to process the same stream data concurrently. The stream clients can be driven either autonomously or by program. The packets are processed according to the incoming metadata and transmited to the output. The Processing Unit has been implemented in VHDL language. The target technology is Field Programmable Gate Array (FPGA).
Porting Netflow/Combo6 Probe from Linux to FreeBSD
Grešša, Pavol ; Kašpárek, Tomáš (referee) ; Čejka, Rudolf (advisor)
The thesis deals with the problem of developing device drivers for FreeBSD operation system and explains particular steps necessary for their implementation. Furthermore, it describes modularity of drivers and basic technologies used in this operation system. Its purpose is to create a device driver for the principal card Combo6x of the Liberouter project. The output of the thesis should be a complete device driver supporting DMA transfers ant interrupts.
The Stateful Packet Processing in P4 Language
Kohout, Pavel ; Martínek, Tomáš (referee) ; Kořenek, Jan (advisor)
With the growing speed and complexity of computer networks, arise requirements for creating powerful devices that are capable of collecting statistics and changing their own functionality according to the demands of network administrators. These requirements can be described using specialized programming languages such as P4. In this bachelor thesis a design, implementation, testing and integration of register and counter stateful memory modules into P4 compiler system for FPGA technology was made. The created system supports the collection of statistics described in P4 language at speeds up to 100 Gbps.
Netopeer: Configuration Platform for Network Devices
Žižlavský, Marek ; Žádník, Martin (referee) ; Kořenek, Jan (advisor)
Master's thesis analyzes available network device configuration options and describes NETCONF configuration protocol and NETCONF event notifications extension in details. It describes Netopeer, open configuration platform developed on Liberouter project, and its pitote deployment as FlowMon probe remote configuration system. Newly designed Netopeer architecture, which adds support for NETCONF event notifications, was verified by reference implementation. Security of the new design and implementation was analyzed, and recommended system settings were provided. This Master's thesis is based on results of previous bachelor's thesis of author and on existing software tools developed by the Liberouter project.
Web Configuration Interface for Network Devices
Žižlavský, Marek ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor)
Main goal of this bachelor work is to design a universal configuration system for remote network device configuration based on the NETCONF protocol and to develop a web configuration interface for the FlowMon, monitoring probe. This work uses existing software tools developed by the Liberouter project. Main objective of the implementation part of this work is to develop a web configuration interface, supporting class libraries for configuration management and GUI creation in PHP. Implemented web configuration interface for the FlowMon probe is a fully-functional prototype of a configuration interface based on concepts of the universal configuration system designed in this bachelor work.
Design of Network Applications for a NetCOPE Platform
Hank, Andrej ; Kořenek, Jan (referee) ; Martínek, Tomáš (advisor)
Monitoring and security in multigigabit networks with speeds 1 - 100 Gb/s needs hardware acceleration. NetCOPE platform for rapid development of network applications uses hardware acceleration card with FPGA technology by means of hardware/software codesign. Increas in performance of platform's software part is dependent of parallel processing in applications to take advantage of utilising more processor cores. This thesis analyses NetCOPE platform architecture and possibilities of parallelising classic network applications and creates models of concurrent access to data in NetCOPE platform to utilize more processor cores. These models are subsequently implemented as extensions to platform's Linux system drivers. Userspace libraries are created to provide simple interface for applications to use these new features. To achieve high throughput of this solution several optimizations are performed. Results are measured by created testing tools.

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