National Repository of Grey Literature 7 records found  Search took 0.01 seconds. 
Design of sigma-delta digital-to-analog converter in CMOS technology
Soukup, Luděk ; Pristach, Marián (referee) ; Fujcik, Lukáš (advisor)
This master’s thesis deals with the issue of digital to analog conversion and possibility of its realization in digital circuits. Goal of this project is to design sigma-delta digital to analog converter with resolution of 14 bits and frequency band (0 ÷ 20) kHz. Main functional blocks: interpolator and modulator sigma-delta will be realized like digital structures. Reconstruction filter will be realized like an analog structure. For design a check of parameters of designed converter programs MATLAB and Simulink are used. Designed digital structures will be described by VHDL language.
Design of CMOS integrated circuits
Nevrkla, Marek ; Bajer, Arnošt (referee) ; Musil, Vladislav (advisor)
This work deals with issues of design and simulation of analog CMOS integrated circuit. The general aim is to design transconductance amplifier working with low input offset voltage. The two stage operational – transconductance amplifier with compensation RC element is presented. Creation topography amplifier by the help of technology AMIS 07.
Physical inspection of IC prototypes by reverse engineering
Štětina, Hynek ; Fujcik, Lukáš (referee) ; Boušek, Jaroslav (advisor)
This bachelor’s thesis deals with techniques of reverse engineering of integrated circuits and their usage for circuit elements inspection. The practical example demonstrates use of acquired data. Further direction is given to the possibility of comparing acquired data with data from design enviroment.
Saving area and power consumption in 65 nm digital standard cell library
Král, Vojtěch
This study aims to investigate multi-bit pulsed latches in comparison with multi-bit flip flops as one of the low-power solutions in 65 nm technology process. Topologies of pulse generators and multi-bit pulsed latches were investigated to find out which can be more suitable. The pulse generator was chosen because of its low power and a small area in comparison with other options. The pulse generator is made of a simple AND logical gate and a double-stacked inverter. The pulsed latch was also chosen because of its low power, small area, and reliability of the circuit. The chosen topology is modified PPCLA. Simulations of the chosen topology had shown that multi-bit flip flops could be replaced with more effective multi-bit pulsed latches.
Physical inspection of IC prototypes by reverse engineering
Štětina, Hynek ; Fujcik, Lukáš (referee) ; Boušek, Jaroslav (advisor)
This bachelor’s thesis deals with techniques of reverse engineering of integrated circuits and their usage for circuit elements inspection. The practical example demonstrates use of acquired data. Further direction is given to the possibility of comparing acquired data with data from design enviroment.
Design of CMOS integrated circuits
Nevrkla, Marek ; Bajer, Arnošt (referee) ; Musil, Vladislav (advisor)
This work deals with issues of design and simulation of analog CMOS integrated circuit. The general aim is to design transconductance amplifier working with low input offset voltage. The two stage operational – transconductance amplifier with compensation RC element is presented. Creation topography amplifier by the help of technology AMIS 07.
Design of sigma-delta digital-to-analog converter in CMOS technology
Soukup, Luděk ; Pristach, Marián (referee) ; Fujcik, Lukáš (advisor)
This master’s thesis deals with the issue of digital to analog conversion and possibility of its realization in digital circuits. Goal of this project is to design sigma-delta digital to analog converter with resolution of 14 bits and frequency band (0 ÷ 20) kHz. Main functional blocks: interpolator and modulator sigma-delta will be realized like digital structures. Reconstruction filter will be realized like an analog structure. For design a check of parameters of designed converter programs MATLAB and Simulink are used. Designed digital structures will be described by VHDL language.

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