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National Repository of Grey Literature 3 records found  Search took 0.01 seconds. 
Visual Simulator of Associative Memory Type of Neural Networks
 Mráček, Štěpán ; Zbořil, František (referee) ; Martinek, David (advisor)
This bachelor thesis is focused on associative neural networks. The theoretical part of the~thesis presents an explanation of neuron, neural network and associative memory concepts. The practical part is about designing and implementing an application allowing the~demonstration of learning algorithms and the response to specific input.
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Visual Simulator of Associative Memory Type of Neural Networks
 Mráček, Štěpán ; Zbořil, František (referee) ; Martinek, David (advisor)
This bachelor thesis is focused on associative neural networks. The theoretical part of the~thesis presents an explanation of neuron, neural network and associative memory concepts. The practical part is about designing and implementing an application allowing the~demonstration of learning algorithms and the response to specific input.
Detailed record
Optimization of Crossproduct-Based Classification Algorithms
 Kajan, Michal ; Kořenek, Jan (referee) ; Puš, Viktor (advisor)
This thesis deals with the packet classification problem in computer networks. It introduces packet classification along with the demands on classification algorithms. Different approaches to packet classification and several concrete examples of modern classification algorithms with their properties are described. The aim is on algorithms which can be implemented in hardware. Crossproduct-based algorithms are described in more detail whose biggest advantage is classification speed, but their disadvantage consists in great memory requirements. Several optimization methods based on state space search are presented. These optimization methods are based on reduction of original ruleset by selecting a small number of rules to associative memory. Lastly, utilization of associative memory as a flexible part of classification is illustrated together with the potential hardware implementation of such memory directly on a chip.
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