|
|
A VHDL Parser for Formal Verification
Matyáš, Jiří ; Smrčka, Aleš (referee) ; Charvát, Lukáš (advisor)
The principal goal of this bachelor thesis is to design and implement a parser of VHDL language into graph representation in VAM (Variable Assignment Language). The application is developed for formal verification purposes of VeriFIT research group of the Faculty of Information Technology, Brno University of Technology. The development of the compiler described in this thesis should provide the opportunity to use formal verification techniques to verify hardware designs described in high level design languages, such as VHDL.
|
|
|
Influence of military disturbances on succession of arthropod communities in Brdy
Palivcová, Lucie ; Tropek, Robert (advisor) ; Knapp, Michal (referee)
The thesis aims for relationship between military-caused disturbance intensity and species richness, conservation value and composition of arthropods communities in the Brdy Mts. In the Brdy abandoned military area (MTA), a highly heterogeneous habitat mosaic developed by the long-term influence of military disturbances on two shooting areas of Jordán and Tok. The habitats range from strongly disturbed sites with sparse vegetation, through heterogeneous growths of Erica and Vaccinium in moderately disturbed sites, to sparse woodlands in the least disturbed sites. Based on the shooting areas history reconstruction, 24 study plots of 4 categories of different disturbance intensity were selected in both shooting areas together. Standardized sampling of seven groups of arthropods was performed in summer 2017 by pitfall traps, yellow pan traps, and light traps. More intensive disturbances positively influenced species richness of Aculeates and conservation value of spiders and beetles, but negatively affected species richness of moths. Simultaneously, the intensity of disturbances affected community composition of spiders, moths, beetles, Aculeates and Orthopteroids. Endangered species mostly affiliated to the more intensively disturbed plots. This results should be helpful in understanding of influence...
|
|
|
A VHDL Parser for Formal Verification
Matyáš, Jiří ; Smrčka, Aleš (referee) ; Charvát, Lukáš (advisor)
The principal goal of this bachelor thesis is to design and implement a parser of VHDL language into graph representation in VAM (Variable Assignment Language). The application is developed for formal verification purposes of VeriFIT research group of the Faculty of Information Technology, Brno University of Technology. The development of the compiler described in this thesis should provide the opportunity to use formal verification techniques to verify hardware designs described in high level design languages, such as VHDL.
|
|
|
The selected investment project effectiveness evaluation
MINARČÍKOVÁ, Jana
The central topic of this bachelor work is The selected investment project effectiveness evaluation. Its main objective is to create a system of economic investment evaluation which will enable to valorize the chosen project efficiency. In the practical part a company Ingersoll-Rand Equipment Manufacturing Czech Republic ltd placed in Kolín investment is inquired. The chosen investment project was introduced and later explored. The cash flow definition was formed and consequently particular coefficients were counted. These taken namely into account were its return on investment period, its net present value and its inner yield percentage. After calculation realization the investment was proved as irrecoverable. The investment realization itself brings discounts therefore an attempt to use tax shield was carried out. After considering the tax influence on the investment the project was characterized as efficient. It has to be taken into account that the mentioned tax shield can be used only in case that the business is profittable. The 2012 profit and loss account shows that the company met the profit condition, therefore the variation including the tax effect may be applied.
|
guest ::
