National Repository of Grey Literature 61 records found  beginprevious52 - 61  jump to record: Search took 0.00 seconds. 
Wireless Sensors for Smart Home
Brychta, Tomáš ; Viktorin, Jan (referee) ; Korček, Pavol (advisor)
This thesis deals with sensors for wireless communication in smart homes. The task of sensors is to establish connection with controlling unit through which the measured data  will be sent using defined application protocol. The work analyzes in detail the influence of interference on this communication and offers solutions of eradicating this interference to improve stability of communication itself. As a prototype for sensor device we used development kit from Microchip company.
Portation of Lawful Interception System to the Microprobe
Dražil, Jan ; Korček, Pavol (referee) ; Viktorin, Jan (advisor)
The Microprobe is an embedded device for intercepting of network communication. It is a part of the Sec6Net Lawful Intercept System (SLIS). It would be useful to run the Microprobe as a~standalone device. Without it, the microprobe requires connection to SLIS infrastructure which is a~prerequisite to run the Microprobe.  The goal of this thesis is to describe ways how to transfer SLIS to the Microprobe architecture.
Implementation of the Network Traffic Filter by Microblaze in FPGA
Viktorin, Jan ; Korček, Pavol (referee) ; Kaštil, Jan (advisor)
The thesis explores the area of hardware acceleration of a software network traffic filter running inside processor MicroBlaze in the FPGA Spartan-3E. The accelerated application is widely used firewall from the Linux Kernel called iptables, more precisely its extension L7-filter. L7-filter performs lookups inside network traffic using regular expressions. Because of its significant influence on the application performance, it has been exchanged with a hardware unit controlled from the Linux Kernel. The performance has been increased more than twice.
HW/SW Codesign for the Xilinx Zynq Platform
Viktorin, Jan ; Košař, Vlastimil (referee) ; Korček, Pavol (advisor)
This work describes a novel approach of HW/SW codesign on the Xilinx Zynq and similar platforms. It deals with interconnections between the Processing System (ARM Cortex-A9 MPCore) and the Programmable Logic (FPGA) to find an abstract and universal way to develop applications that are partially offloaded into the programmable hardware and that run in the Linux operating system. For that purpose a framework for HW/SW codesign on the Zynq and similar platforms is designed. No such framework is currently available.
Framework for Dynamic Partial Reconfiguration of Virtex-5 FPGA
Raček, Jakub ; Viktorin, Jan (referee) ; Matoušek, Jiří (advisor)
The thesis is focused on design and implementiation of a framework for Dynamic Partial Reconfiguration for FPGA architecture Virtex-5. The aim of the framework is to simplify creating applications with hardware accelerators using  Dynamic Partial Reconfiguration. Using this framework, a demonstration application was created for pattern-matching incoming network packets. The process of Dynamic Partial Reconfiguration is controlled by GNU/Linux type operating system, which runs on MicroBlaze processor. This also allows to run less demanding applications and the processing of packets using software.
Modular Framework for Sensor Data Processing
Rašovský, Martin ; Viktorin, Jan (referee) ; Korček, Pavol (advisor)
The bachelor thesis deals with the issue of concept and realization of the server application for a smart home system, where the purpose of the whole application is in the form of framework that offers the calculations and possible actions among the system. The theoretical part of this thesis analyses and describes architecture of the existing system with the focus on the server part. From previous analysis is derived the concept of the application . The concept describes the way of communication with other nodes of the system, storing data and configuration . Further the thesis selects the used technologies and deals with the implementation details of the project. Furthermore the thesis documents testing , the integration into described smart home system and results of functionality of the application . In the conclusion is discussed further possible expansions of the project.
Communication with FPGA Circuits Using DMA PL330
Havran, Jan ; Košař, Vlastimil (referee) ; Viktorin, Jan (advisor)
This thesis describes the design and implementation of communication with FPGA using PL330 circuit. For this solution were implemented two kernel modules for OS Linux in language C. These modules provides interface for effective communication between user space application and FPGA.
Measuring of System Load in Embedded Linux
Skopal, Jakub ; Korček, Pavol (referee) ; Viktorin, Jan (advisor)
The bachelor thesis describes the quantities which characterize the load of the embedded systems based on the Linux kernel. The library was designed and implemented to observe the load of the system in order to facilitate and unify the observation of individual quantities and their reciprocal coherence. Due to the lack of external dependencies of the library the memory requirements are low. To demonstrate the use of the implemented library, a program was designed which depicts the graphs of measured quantities in real time on a remote computer.
Library for Fast Network Traffic Processing
Vokráčko, Lukáš ; Viktorin, Jan (referee) ; Kořenek, Jan (advisor)
This thesis is focused on time-critical operations in context of computer networks. Processed operations are packet classification, specially one-dimensional classification, longest prefix matching using binary search on prefix length and TreeBitmap, pattern matching using Aho-Corasick, regular expression matching and packet header analysis and extraction. Purpose of this work is to design API for library implementing these operations. Implementation speed of these operations is measured on Intel and ARM platforms.
Acceleration of Graphics Algorithms by NEON Coprocessor
Kratochvíl, Radim ; Jaroš, Jiří (referee) ; Viktorin, Jan (advisor)
The aim of this work is to examine capabilities of NEON coprocessor. Various implementations of the same algorithm are compared: language C, assembly language, language C with intinsic functions and automatically vectorized code. Main conslusion is, that computation time can be reduced up to 60 times, allowing real-time HD video processing.

National Repository of Grey Literature : 61 records found   beginprevious52 - 61  jump to record:
See also: similar author names
6 VIKTORIN, Jiří
6 Viktorin, Jiří
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